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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peng Fan186585c2016-12-11 19:24:37 +08002/*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
Peng Fan186585c2016-12-11 19:24:37 +08004 */
5
Simon Glassa7b51302019-11-14 12:57:46 -07006#include <init.h>
Peng Fan186585c2016-12-11 19:24:37 +08007#include <asm/arch/clock.h>
8#include <asm/arch/crm_regs.h>
9#include <asm/arch/iomux.h>
10#include <asm/arch/imx-regs.h>
11#include <asm/arch/mx6-pins.h>
12#include <asm/arch/sys_proto.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060013#include <asm/global_data.h>
Peng Fan186585c2016-12-11 19:24:37 +080014#include <asm/gpio.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020015#include <asm/mach-imx/iomux-v3.h>
16#include <asm/mach-imx/boot_mode.h>
Peng Fan186585c2016-12-11 19:24:37 +080017#include <asm/io.h>
Peng Fan186585c2016-12-11 19:24:37 +080018#include <linux/sizes.h>
19#include <mmc.h>
20#include <power/pmic.h>
21#include <power/pfuze100_pmic.h>
22#include "../common/pfuze.h"
23
24DECLARE_GLOBAL_DATA_PTR;
25
Peng Fan186585c2016-12-11 19:24:37 +080026int dram_init(void)
27{
28 gd->ram_size = imx_ddr_size();
29
30 return 0;
31}
32
Peng Fan186585c2016-12-11 19:24:37 +080033static iomux_v3_cfg_t const wdog_pads[] = {
34 MX6_PAD_WDOG_B__WDOG1_B | MUX_PAD_CTRL(NO_PAD_CTRL),
35};
36
Peng Fan186585c2016-12-11 19:24:37 +080037#ifdef CONFIG_DM_PMIC_PFUZE100
38int power_init_board(void)
39{
40 struct udevice *dev;
41 int ret;
42 u32 dev_id, rev_id, i;
43 u32 switch_num = 6;
44 u32 offset = PFUZE100_SW1CMODE;
45
Peng Fan43194a02022-11-07 16:00:10 +080046 ret = pmic_get("pfuze100@8", &dev);
Peng Fan186585c2016-12-11 19:24:37 +080047 if (ret == -ENODEV)
48 return 0;
49
50 if (ret != 0)
51 return ret;
52
53 dev_id = pmic_reg_read(dev, PFUZE100_DEVICEID);
54 rev_id = pmic_reg_read(dev, PFUZE100_REVID);
55 printf("PMIC: PFUZE100! DEV_ID=0x%x REV_ID=0x%x\n", dev_id, rev_id);
56
57
58 /* Init mode to APS_PFM */
59 pmic_reg_write(dev, PFUZE100_SW1ABMODE, APS_PFM);
60
61 for (i = 0; i < switch_num - 1; i++)
62 pmic_reg_write(dev, offset + i * SWITCH_SIZE, APS_PFM);
63
64 /* set SW1AB staby volatage 0.975V */
65 pmic_clrsetbits(dev, PFUZE100_SW1ABSTBY, 0x3f, 0x1b);
66
67 /* set SW1AB/VDDARM step ramp up time from 16us to 4us/25mV */
68 pmic_clrsetbits(dev, PFUZE100_SW1ABCONF, 0xc0, 0x40);
69
70 /* set SW1C staby volatage 0.975V */
71 pmic_clrsetbits(dev, PFUZE100_SW1CSTBY, 0x3f, 0x1b);
72
73 /* set SW1C/VDDSOC step ramp up time to from 16us to 4us/25mV */
74 pmic_clrsetbits(dev, PFUZE100_SW1CCONF, 0xc0, 0x40);
75
76 return 0;
77}
78#endif
79
80int board_early_init_f(void)
81{
Peng Fan186585c2016-12-11 19:24:37 +080082 return 0;
83}
84
85int board_init(void)
86{
87 /* Address of boot parameters */
88 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
89
90 return 0;
91}
92
93int board_late_init(void)
94{
95 imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
96
97 return 0;
98}
99
100int checkboard(void)
101{
102 puts("Board: MX6SLL EVK\n");
103
104 return 0;
105}
106
107int board_mmc_get_env_dev(int devno)
108{
109 return devno;
110}
111
112int mmc_map_to_kernel_blk(int devno)
113{
114 return devno;
115}