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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Thierry Redingbc2e7f82011-11-17 00:10:24 +00002/*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
Thierry Reding99f96682012-06-04 20:02:24 +00005 * (C) Copyright 2011-2012
Thierry Redingbc2e7f82011-11-17 00:10:24 +00006 * Avionic Design GmbH <www.avionic-design.de>
Thierry Redingbc2e7f82011-11-17 00:10:24 +00007 */
8
Thierry Redingbc2e7f82011-11-17 00:10:24 +00009#include <ns16550.h>
10#include <asm/io.h>
11#include <asm/gpio.h>
Thierry Redingbc2e7f82011-11-17 00:10:24 +000012#include <asm/arch/clock.h>
Simon Glassb73aa382012-01-11 12:42:26 +000013#include <asm/arch/funcmux.h>
Thierry Redingbc2e7f82011-11-17 00:10:24 +000014#include <asm/arch/pinmux.h>
Tom Warrenab371962012-09-19 15:50:56 -070015#include <asm/arch/tegra.h>
16#include <asm/arch-tegra/board.h>
17#include <asm/arch-tegra/clk_rst.h>
Tom Warrenab371962012-09-19 15:50:56 -070018#include <asm/arch-tegra/sys_proto.h>
19#include <asm/arch-tegra/uart.h>
Thierry Redingbc2e7f82011-11-17 00:10:24 +000020
Thierry Reding1cf10362012-06-04 20:02:28 +000021#ifdef CONFIG_BOARD_EARLY_INIT_F
22void gpio_early_init(void)
23{
Stephen Warren7f20bb22016-05-12 12:07:39 -060024 gpio_request(TEGRA_GPIO(I, 4), NULL);
25 gpio_direction_output(TEGRA_GPIO(I, 4), 1);
Thierry Reding1cf10362012-06-04 20:02:28 +000026}
27#endif
28
Masahiro Yamadab2c88682017-01-10 13:32:07 +090029#ifdef CONFIG_MMC_SDHCI_TEGRA
Thierry Redingbc2e7f82011-11-17 00:10:24 +000030/*
31 * Routine: pin_mux_mmc
32 * Description: setup the pin muxes/tristate values for the SDMMC(s)
33 */
Tom Warren9745cf82013-02-21 12:31:30 +000034void pin_mux_mmc(void)
Thierry Redingbc2e7f82011-11-17 00:10:24 +000035{
Simon Glassb73aa382012-01-11 12:42:26 +000036 funcmux_select(PERIPH_ID_SDMMC4, FUNCMUX_SDMMC4_ATB_GMA_GME_8_BIT);
Thierry Reding67f69db2012-06-04 20:02:29 +000037 /* for write-protect GPIO PI6 */
Stephen Warrenf27f4e82014-03-21 12:28:58 -060038 pinmux_tristate_disable(PMUX_PINGRP_ATA);
Thierry Reding99f96682012-06-04 20:02:24 +000039 /* for CD GPIO PH2 */
Stephen Warrenf27f4e82014-03-21 12:28:58 -060040 pinmux_tristate_disable(PMUX_PINGRP_ATD);
Thierry Redingbc2e7f82011-11-17 00:10:24 +000041}
Thierry Redingbc2e7f82011-11-17 00:10:24 +000042#endif