Marek Vasut | 6468c4c | 2024-02-27 17:05:55 +0100 | [diff] [blame] | 1 | if ARCH_RENESAS |
Masahiro Yamada | c9c54e2 | 2014-08-31 07:10:57 +0900 | [diff] [blame] | 2 | |
Marek Vasut | 1406bdc | 2023-02-28 07:28:56 +0100 | [diff] [blame] | 3 | # Renesas ARM SoCs R-Car Gen3/Gen4 (64bit) |
| 4 | config RCAR_64 |
| 5 | bool |
Nobuhiro Iwamatsu | 4dc515a | 2016-04-01 03:51:34 +0900 | [diff] [blame] | 6 | select ARM64 |
Hiroyuki Yokoyama | 7b8f69c | 2018-09-26 14:32:13 +0900 | [diff] [blame] | 7 | select CMD_CACHE |
Marek Vasut | ce52852 | 2021-04-03 16:58:49 +0200 | [diff] [blame] | 8 | select OF_BOARD_SETUP |
Marek Vasut | fbae595 | 2023-02-28 07:28:54 +0100 | [diff] [blame] | 9 | select PHY |
Marek Vasut | 04a9c56 | 2019-04-21 22:14:11 +0200 | [diff] [blame] | 10 | select PINCONF |
Marek Vasut | fbae595 | 2023-02-28 07:28:54 +0100 | [diff] [blame] | 11 | select PINCTRL |
Marek Vasut | 253a949 | 2021-06-13 22:40:45 +0200 | [diff] [blame] | 12 | select POSITION_INDEPENDENT |
Marek Vasut | d5ccf46 | 2018-12-03 23:46:11 +0100 | [diff] [blame] | 13 | imply CMD_FS_UUID |
| 14 | imply CMD_GPT |
Marek Vasut | d5ccf46 | 2018-12-03 23:46:11 +0100 | [diff] [blame] | 15 | imply CMD_MMC_SWRITE if MMC |
Marek Vasut | fbae595 | 2023-02-28 07:28:54 +0100 | [diff] [blame] | 16 | imply CMD_UUID |
Marek Vasut | 36097b7 | 2024-03-18 15:59:38 +0100 | [diff] [blame] | 17 | imply OF_UPSTREAM |
Marek Vasut | 1406bdc | 2023-02-28 07:28:56 +0100 | [diff] [blame] | 18 | imply SUPPORT_EMMC_RPMB if MMC |
| 19 | |
| 20 | choice |
| 21 | prompt "Target Renesas SoC select" |
| 22 | default RCAR_32 |
| 23 | |
| 24 | config RCAR_32 |
| 25 | bool "Renesas ARM SoCs R-Car Gen1/Gen2 (32bit)" |
| 26 | select CPU_V7A |
| 27 | |
| 28 | config RCAR_GEN3 |
| 29 | bool "Renesas ARM SoCs R-Car Gen3 (64bit)" |
| 30 | select RCAR_64 |
| 31 | select SUPPORT_SPL |
Paul Barker | 7dd5633 | 2023-10-16 10:25:30 +0100 | [diff] [blame] | 32 | select PINCTRL_PFC |
Marek Vasut | e39fa7d | 2018-10-03 12:44:13 +0200 | [diff] [blame] | 33 | imply SPL |
| 34 | imply SPL_BOARD_INIT |
| 35 | imply SPL_GZIP |
| 36 | imply SPL_LIBCOMMON_SUPPORT |
| 37 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 38 | imply SPL_SERIAL |
Marek Vasut | e39fa7d | 2018-10-03 12:44:13 +0200 | [diff] [blame] | 39 | imply SPL_SYS_MALLOC_SIMPLE |
| 40 | imply SPL_TINY_MEMSET |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 41 | imply SPL_USE_TINY_PRINTF |
Marek Vasut | fbae595 | 2023-02-28 07:28:54 +0100 | [diff] [blame] | 42 | imply SPL_YMODEM_SUPPORT |
Nobuhiro Iwamatsu | 4dc515a | 2016-04-01 03:51:34 +0900 | [diff] [blame] | 43 | |
Hai Pham | 9046b5f | 2023-02-28 22:22:03 +0100 | [diff] [blame] | 44 | config RCAR_GEN4 |
| 45 | bool "Renesas ARM SoCs R-Car Gen4 (64bit)" |
| 46 | select RCAR_64 |
Paul Barker | 7dd5633 | 2023-10-16 10:25:30 +0100 | [diff] [blame] | 47 | select PINCTRL_PFC |
Hai Pham | 9046b5f | 2023-02-28 22:22:03 +0100 | [diff] [blame] | 48 | |
Chris Brandt | 43b11d9 | 2017-08-23 14:53:59 -0500 | [diff] [blame] | 49 | config RZA1 |
| 50 | prompt "Renesas ARM SoCs RZ/A1 (32bit)" |
| 51 | select CPU_V7A |
| 52 | |
Ralph Siemsen | 7159e2c | 2023-05-12 21:36:55 -0400 | [diff] [blame] | 53 | config RZN1 |
| 54 | prompt "Renesas ARM SoCs RZ/N1 (32bit)" |
| 55 | select CPU_V7A |
| 56 | select ARMV7_SET_CORTEX_SMPEN if !SPL |
| 57 | select SPL_ARMV7_SET_CORTEX_SMPEN if SPL |
| 58 | select CLK |
| 59 | select CLK_RENESAS |
| 60 | select CLK_R9A06G032 |
| 61 | select DM |
| 62 | select DM_ETH |
| 63 | select DM_SERIAL |
| 64 | select PINCTRL |
| 65 | select PINCONF |
| 66 | select REGMAP |
| 67 | select SYSRESET |
| 68 | select SYSRESET_SYSCON |
| 69 | imply CMD_DM |
| 70 | |
Paul Barker | a774a3e | 2023-10-16 10:25:27 +0100 | [diff] [blame] | 71 | config RZG2L |
| 72 | prompt "Renesas RZ/G2L Family ARM SoCs" |
| 73 | select GICV3 |
| 74 | select RCAR_64 |
Paul Barker | 132d7ea | 2023-10-16 10:25:29 +0100 | [diff] [blame] | 75 | imply CLK_RZG2L |
Paul Barker | a774a3e | 2023-10-16 10:25:27 +0100 | [diff] [blame] | 76 | imply MULTI_DTB_FIT |
| 77 | imply MULTI_DTB_FIT_USER_DEFINED_AREA |
Paul Barker | 6b8b56e | 2023-10-16 10:25:32 +0100 | [diff] [blame] | 78 | imply PINCTRL_RZG2L |
Paul Barker | a774a3e | 2023-10-16 10:25:27 +0100 | [diff] [blame] | 79 | imply RENESAS_SDHI |
Paul Barker | de430eb | 2023-10-16 10:25:33 +0100 | [diff] [blame] | 80 | imply RZG2L_GPIO |
Paul Barker | 327571c | 2023-10-19 15:30:44 +0100 | [diff] [blame] | 81 | imply SCIF_CONSOLE |
Paul Barker | 7fe0e0a | 2024-02-27 20:40:30 +0000 | [diff] [blame] | 82 | imply SYS_I2C_RZ_RIIC |
Paul Barker | a774a3e | 2023-10-16 10:25:27 +0100 | [diff] [blame] | 83 | imply SYS_MALLOC_F |
| 84 | help |
| 85 | Enable support for the Renesas RZ/G2L family of SoCs. Currently |
| 86 | support is only included for the RZ/G2L itself (based on the R9A07G044 |
| 87 | SoC). Support for additional SoCs in this family (RZ/G2LC, RZ/G2UL, |
| 88 | RZ/V2L & RZ/Five) is not yet available. |
| 89 | |
Nobuhiro Iwamatsu | 98e559c | 2015-03-05 08:30:37 +0900 | [diff] [blame] | 90 | endchoice |
| 91 | |
Marek Vasut | 95f6e4b | 2023-02-28 07:28:55 +0100 | [diff] [blame] | 92 | config SYS_SOC |
Marek Vasut | e3f84ec | 2024-02-27 17:05:56 +0100 | [diff] [blame] | 93 | default "renesas" if ARCH_RENESAS |
Marek Vasut | 95f6e4b | 2023-02-28 07:28:55 +0100 | [diff] [blame] | 94 | |
Marek Vasut | e3f84ec | 2024-02-27 17:05:56 +0100 | [diff] [blame] | 95 | source "arch/arm/mach-renesas/Kconfig.32" |
| 96 | source "arch/arm/mach-renesas/Kconfig.64" |
| 97 | source "arch/arm/mach-renesas/Kconfig.rza1" |
| 98 | source "arch/arm/mach-renesas/Kconfig.rzn1" |
| 99 | source "arch/arm/mach-renesas/Kconfig.rzg2l" |
Masahiro Yamada | c9c54e2 | 2014-08-31 07:10:57 +0900 | [diff] [blame] | 100 | |
| 101 | endif |