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Zubair Lutfullah Kakakhel1d153b32016-07-29 15:11:20 +01001/*
2 * Imagination Technologies MIPSfpga platform code
3 *
4 * Copyright (C) 2016, Imagination Technologies Ltd.
5 *
6 * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
7 *
8 * SPDX-License-Identifier: GPL-2.0+
9 *
10 */
11
12#include <common.h>
13
Simon Glass39f90ba2017-03-31 08:40:25 -060014DECLARE_GLOBAL_DATA_PTR;
15
Zubair Lutfullah Kakakhel1d153b32016-07-29 15:11:20 +010016/* initialize the DDR Controller and PHY */
Simon Glassd35f3382017-04-06 12:47:05 -060017int dram_init(void)
Zubair Lutfullah Kakakhel1d153b32016-07-29 15:11:20 +010018{
19 /* MIG IP block is smart and doesn't need SW
20 * to do any init */
Simon Glass39f90ba2017-03-31 08:40:25 -060021 gd->ram_size = CONFIG_SYS_SDRAM_SIZE; /* in bytes */
22
23 return 0;
Zubair Lutfullah Kakakhel1d153b32016-07-29 15:11:20 +010024}