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git01.mediatek.com / filogic / uboot / 212b8d832404f91ced518f1cb7aca1f080f9ac5e / . / arch / arm / cpu / arm720t / start.S
blob: ec8e88d4b38b93692247a1f732b54415687f32a0 [file] [log] [blame]
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]1/*
2 * armboot - Startup Code for ARM720 CPU-core
3 *
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +0200[diff] [blame]4 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
5 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]6 *
Wolfgang Denkbd8ec7e2013-10-07 13:07:26 +0200[diff] [blame]7 * SPDX-License-Identifier: GPL-2.0+
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]8 */
9
Wolfgang Denk0191e472010-10-26 14:34:52 +0200[diff] [blame]10#include <asm-offsets.h>
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]11#include <config.h>
wdenkf2140d52004-07-01 16:30:44 +0000[diff] [blame]12#include <asm/hardware.h>
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]13
14/*
15 *************************************************************************
16 *
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]17 * Startup Code (reset vector)
18 *
wdenk927034e2004-02-08 19:38:38 +0000[diff] [blame]19 * do important init only if we don't start from RAM!
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]20 * relocate armboot to ram
21 * setup stack
22 * jump to second stage
23 *
24 *************************************************************************
25 */
26
Albert ARIBAUD9852cc62014-04-15 16:13:51 +0200[diff] [blame]27 .globl reset
Heiko Schochercad80e12010-09-17 13:10:52 +0200[diff] [blame]28
29reset:
30 /*
31 * set the cpu to SVC32 mode
32 */
33 mrs r0,cpsr
34 bic r0,r0,#0x1f
35 orr r0,r0,#0xd3
36 msr cpsr,r0
37
38 /*
39 * we do sys-critical inits only at reboot,
40 * not when booting from ram!
41 */
42#ifndef CONFIG_SKIP_LOWLEVEL_INIT
43 bl cpu_init_crit
44#endif
45
Albert ARIBAUDfacdae52013-01-08 10:18:02 +0000[diff] [blame]46 bl _main
Heiko Schochercad80e12010-09-17 13:10:52 +0200[diff] [blame]47
48/*------------------------------------------------------------------------------*/
49
Albert ARIBAUDfacdae52013-01-08 10:18:02 +0000[diff] [blame]50 .globl c_runtime_cpu_setup
51c_runtime_cpu_setup:
52
53 mov pc, lr
54
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]55/*
56 *************************************************************************
57 *
58 * CPU_init_critical registers
59 *
60 * setup important registers
61 * setup memory timing
62 *
63 *************************************************************************
64 */
65
Axel Lin89a8f7a2013-05-21 13:44:10 +0000[diff] [blame]66#ifndef CONFIG_SKIP_LOWLEVEL_INIT
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]67cpu_init_crit:
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]68
Wolfgang Denk7f88a5e2005-10-06 17:08:18 +0200[diff] [blame]69 mov ip, lr
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]70 /*
71 * before relocating, we have to setup RAM timing
wdenk927034e2004-02-08 19:38:38 +0000[diff] [blame]72 * because memory timing is board-dependent, you will
wdenk336b2bc2005-04-02 23:52:25 +0000[diff] [blame]73 * find a lowlevel_init.S in your board directory.
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]74 */
wdenk336b2bc2005-04-02 23:52:25 +0000[diff] [blame]75 bl lowlevel_init
wdenkfe8c2802002-11-03 00:38:21 +0000[diff] [blame]76 mov lr, ip
77
78 mov pc, lr
Axel Lin89a8f7a2013-05-21 13:44:10 +0000[diff] [blame]79#endif /* CONFIG_SKIP_LOWLEVEL_INIT */