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Marek Vasutb51f8ae2013-06-16 15:39:02 +02001/*
2 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19#ifndef __CONFIGS_MXS_H__
20#define __CONFIGS_MXS_H__
21
22/*
23 * Includes
24 */
25
26#if defined(CONFIG_MX23) && defined(CONFIG_MX28)
27#error Select either CONFIG_MX23 or CONFIG_MX28 , never both!
28#elif !defined(CONFIG_MX23) && !defined(CONFIG_MX28)
29#error Select one of CONFIG_MX23 or CONFIG_MX28 !
30#endif
31
32#include <asm/arch/regs-base.h>
33
34#if defined(CONFIG_MX23)
35#include <asm/arch/iomux-mx23.h>
36#elif defined(CONFIG_MX28)
37#include <asm/arch/iomux-mx28.h>
38#endif
39
40/*
41 * CPU specifics
42 */
43
Marek Vasutb51f8ae2013-06-16 15:39:02 +020044/* Startup hooks */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020045
46/* SPL */
Mans Rullgard65d21902018-04-21 16:11:10 +010047#ifndef CONFIG_SPL_FRAMEWORK
Simon Glassf7bcc092019-09-25 08:56:26 -060048#define CONFIG_SPL_NO_CPU_SUPPORT
Marek Vasutb51f8ae2013-06-16 15:39:02 +020049#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
Mans Rullgard65d21902018-04-21 16:11:10 +010050#endif
Marek Vasutb51f8ae2013-06-16 15:39:02 +020051
52/* Memory sizes */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020053
54/* OCRAM at 0x0 ; 32kB on MX23 ; 128kB on MX28 */
55#define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
56#if defined(CONFIG_MX23)
57#define CONFIG_SYS_INIT_RAM_SIZE (32 * 1024)
58#elif defined(CONFIG_MX28)
59#define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
60#endif
61
62/* Point initial SP in SRAM so SPL can use it too. */
63#define CONFIG_SYS_INIT_SP_OFFSET \
64 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
65#define CONFIG_SYS_INIT_SP_ADDR \
66 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
67
68/*
69 * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
70 * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
71 * binary. In case there was more of this mess, 0x100 bytes are skipped.
Marek Vasut913784a2014-03-05 20:01:13 +010072 *
73 * In case of a HAB boot, we cannot for some weird reason use the first 4KiB
74 * of DRAM when loading. Moreover, we use the first 4 KiB for IVT and CST
75 * blocks, thus U-Boot starts at offset +8 KiB of DRAM start.
76 *
77 * As for the SPL, we must avoid the first 4 KiB as well, but we load the
78 * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB.
Marek Vasutb51f8ae2013-06-16 15:39:02 +020079 */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020080
81/* U-Boot general configuration */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020082#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020083#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
84#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
85 /* Boot argument buffer size */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020086
Marek Vasutb51f8ae2013-06-16 15:39:02 +020087/*
88 * Drivers
89 */
Andreas Wassdb3e24b2013-08-16 18:24:37 +020090/*
91 * DUART Serial Driver.
92 * Conflicts with AUART driver which can be set by board.
93 */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020094#define CONFIG_PL011_CLOCK 24000000
95#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
Robert P. J. Day8d56db92016-07-15 13:44:45 -040096/* Default baudrate can be overridden by board! */
Marek Vasutb51f8ae2013-06-16 15:39:02 +020097
98/* FEC Ethernet on SoC */
99#ifdef CONFIG_FEC_MXC
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200100#ifndef CONFIG_ETHPRIME
101#define CONFIG_ETHPRIME "FEC0"
102#endif
103#ifndef CONFIG_FEC_XCV_TYPE
104#define CONFIG_FEC_XCV_TYPE RMII
105#endif
106#endif
107
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200108/* NAND */
109#ifdef CONFIG_CMD_NAND
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200110#define CONFIG_SYS_MAX_NAND_DEVICE 1
111#define CONFIG_SYS_NAND_BASE 0x60000000
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200112#endif
113
Marek Vasut59251ce2014-03-06 01:52:03 +0100114/* OCOTP */
115#ifdef CONFIG_CMD_FUSE
116#define CONFIG_MXS_OCOTP
117#endif
118
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200119/* SPI */
120#ifdef CONFIG_CMD_SPI
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200121#define CONFIG_SPI_HALF_DUPLEX
122#endif
123
Marek Vasutb51f8ae2013-06-16 15:39:02 +0200124#endif /* __CONFIGS_MXS_H__ */