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git01.mediatek.com / filogic / uboot / 212134668e27326825494f5af86764d23d17d9a2 / . / include / configs / at91sam9rlek.h
blob: c703276bcbc09da4451ff63097f4d7f5fa623e09 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]2/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +0100[diff] [blame]4 * Stelian Pop <stelian@popies.net>
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]5 * Lead Tech Design <www.leadtechdesign.com>
6 *
7 * Configuation settings for the AT91SAM9RLEK board.
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]8 */
9
10#ifndef __CONFIG_H
11#define __CONFIG_H
12
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]13#include <asm/hardware.h>
14
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]15/* ARM asynchronous clock */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]16#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
17#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]18
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]19#define CONFIG_ATMEL_LEGACY
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]20
21/*
22 * Hardware drivers
23 */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]24
Stelian Popcea5c532008-05-08 14:52:32 +0200[diff] [blame]25/* LCD */
Stelian Popcea5c532008-05-08 14:52:32 +0200[diff] [blame]26#define LCD_BPP LCD_COLOR8
27#define CONFIG_LCD_LOGO 1
28#undef LCD_TEST_PATTERN
29#define CONFIG_LCD_INFO 1
30#define CONFIG_LCD_INFO_BELOW_LOGO 1
Stelian Popcea5c532008-05-08 14:52:32 +0200[diff] [blame]31#define CONFIG_ATMEL_LCD 1
32#define CONFIG_ATMEL_LCD_RGB565 1
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]33/* Let board_init_f handle the framebuffer allocation */
34#undef CONFIG_FB_ADDR
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]35
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]36/* SDRAM */
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]37#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
38#define CONFIG_SYS_SDRAM_SIZE 0x04000000
39
40#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang3cbbeb12017-04-18 15:28:27 +0800[diff] [blame]41 (ATMEL_BASE_SRAM + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]42
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]43/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100[diff] [blame]44#ifdef CONFIG_CMD_NAND
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200[diff] [blame]45#define CONFIG_SYS_MAX_NAND_DEVICE 1
Xu, Hong0c0fb212011-08-01 03:56:53 +0000[diff] [blame]46#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200[diff] [blame]47#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100[diff] [blame]48/* our ALE is AD21 */
49#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
50/* our CLE is AD22 */
51#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
52#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6
53#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17
Wolfgang Denk1f797742009-07-18 21:52:24 +0200[diff] [blame]54
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +0100[diff] [blame]55#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]56
57/* Ethernet - not present */
58
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200[diff] [blame]59#ifdef CONFIG_SYS_USE_DATAFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]60
61/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Wenyou.Yang@microchip.com5d7fd3e2017-07-21 13:40:10 +0800[diff] [blame]62#define CONFIG_BOOTCOMMAND "sf probe 0; " \
63 "sf read 0x22000000 0x84000 0x294000; " \
64 "bootm 0x22000000"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]65
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]66#elif CONFIG_SYS_USE_NANDFLASH
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]67
68/* bootstrap + u-boot + env + linux in nandflash */
Wu, Joshf8e70d92015-02-03 11:38:30 +0800[diff] [blame]69#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x600000; " \
70 "nand read 0x21000000 0x180000 0x80000; " \
71 "bootz 0x22000000 - 0x21000000"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]72
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]73#else /* CONFIG_SYS_USE_MMC */
74
75/* bootstrap + u-boot + env + linux in mmc */
Wu, Josh7ff194f2015-02-02 17:51:01 +0800[diff] [blame]76#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91sam9rlek.dtb; " \
77 "fatload mmc 0:1 0x22000000 zImage; " \
78 "bootz 0x22000000 - 0x21000000"
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]79#endif
Stelian Pop0bf5cad2008-05-08 18:52:25 +0200[diff] [blame]80#endif