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git01.mediatek.com / filogic / uboot / 20e6341bd1734af255a234c0c8ce72d5cb034511 / . / configs / nanopi-m4b-rk3399_defconfig
blob: 678f4d9d823fc48546f766f625c0546bdcf3a811 [file] [log] [blame]
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]1CONFIG_ARM=y
Tom Rinie1e85442021-08-27 21:18:30 -0400[diff] [blame]2CONFIG_SKIP_LOWLEVEL_INIT=y
Peng Fanc8a61c02022-04-13 17:47:20 +0800[diff] [blame]3CONFIG_COUNTER_FREQUENCY=24000000
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]4CONFIG_ARCH_ROCKCHIP=y
Jonas Karlman20e63412024-04-30 15:30:25 +0000[diff] [blame^]5CONFIG_SPL_GPIO=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]6CONFIG_NR_DRAM_BANKS=1
7CONFIG_ENV_OFFSET=0x3F8000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]8CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b"
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]9CONFIG_ROCKCHIP_RK3399=y
10CONFIG_TARGET_EVB_RK3399=y
11CONFIG_DEBUG_UART_BASE=0xFF1A0000
12CONFIG_DEBUG_UART_CLOCK=24000000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]13CONFIG_SYS_LOAD_ADDR=0x800800
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]14CONFIG_DEBUG_UART=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]15CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb"
16CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Riniabb0f522022-05-16 17:20:26 -0400[diff] [blame]17CONFIG_SPL_MAX_SIZE=0x2e000
18CONFIG_SPL_PAD_TO=0x7f8000
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]19# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
Quentin Schulz95edee72023-06-21 18:02:52 +0200[diff] [blame]20CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]21CONFIG_TPL=y
22CONFIG_CMD_BOOTZ=y
23CONFIG_CMD_GPT=y
24CONFIG_CMD_MMC=y
25CONFIG_CMD_USB=y
26# CONFIG_CMD_SETEXPR is not set
27CONFIG_CMD_TIME=y
28CONFIG_SPL_OF_CONTROL=y
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]29CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]30CONFIG_ENV_IS_IN_MMC=y
31CONFIG_SYS_RELOC_GD_ENV_ADDR=y
32CONFIG_ROCKCHIP_GPIO=y
33CONFIG_SYS_I2C_ROCKCHIP=y
34CONFIG_MMC_DW=y
35CONFIG_MMC_DW_ROCKCHIP=y
36CONFIG_MMC_SDHCI=y
37CONFIG_MMC_SDHCI_ROCKCHIP=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]38CONFIG_ETH_DESIGNWARE=y
39CONFIG_GMAC_ROCKCHIP=y
40CONFIG_PMIC_RK8XX=y
41CONFIG_REGULATOR_PWM=y
Jonas Karlman20e63412024-04-30 15:30:25 +0000[diff] [blame^]42CONFIG_SPL_DM_REGULATOR_FIXED=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]43CONFIG_REGULATOR_RK8XX=y
44CONFIG_PWM_ROCKCHIP=y
45CONFIG_BAUDRATE=1500000
46CONFIG_DEBUG_UART_SHIFT=2
Tom Rinidc172ee2022-12-04 09:39:03 -0500[diff] [blame]47CONFIG_SYS_NS16550_MEM32=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]48CONFIG_SYSRESET=y
49CONFIG_USB=y
50CONFIG_USB_XHCI_HCD=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]51CONFIG_USB_EHCI_HCD=y
52CONFIG_USB_EHCI_GENERIC=y
Jonas Karlmanac8d1572023-11-12 17:48:57 +0000[diff] [blame]53CONFIG_USB_DWC3=y
54CONFIG_USB_DWC3_GENERIC=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]55CONFIG_USB_KEYBOARD=y
56CONFIG_USB_HOST_ETHER=y
57CONFIG_USB_ETHER_ASIX=y
58CONFIG_USB_ETHER_ASIX88179=y
59CONFIG_USB_ETHER_MCS7830=y
60CONFIG_USB_ETHER_RTL8152=y
61CONFIG_USB_ETHER_SMSC95XX=y
Simon Glass52cb5042022-10-18 07:46:31 -0600[diff] [blame]62CONFIG_VIDEO=y
Alexandre Vicenzibc592bd2021-03-26 13:37:10 +0100[diff] [blame]63CONFIG_DISPLAY=y
64CONFIG_VIDEO_ROCKCHIP=y
65CONFIG_DISPLAY_ROCKCHIP_HDMI=y
66CONFIG_SPL_TINY_MEMSET=y
67CONFIG_ERRNO_STR=y