blob: 664d310d43d382f8c0e6dbf58f2559674c2798b3 [file] [log] [blame]
wdenk1df49e22002-09-17 21:37:55 +00001/*
2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * Date & Time support for the MK48T59 RTC
26 */
27
28#undef RTC_DEBUG
29
30#include <common.h>
31#include <command.h>
32#include <config.h>
33#include <rtc.h>
34#include <mk48t59.h>
35
36#if defined(CONFIG_RTC_MK48T59)
37
38#if defined(CONFIG_BAB7xx)
39
40static uchar rtc_read (short reg)
41{
42 out8(RTC_PORT_ADDR0, reg & 0xFF);
43 out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
44 return in8(RTC_PORT_DATA);
45}
46
47static void rtc_write (short reg, uchar val)
48{
49 out8(RTC_PORT_ADDR0, reg & 0xFF);
50 out8(RTC_PORT_ADDR1, (reg>>8) & 0xFF);
51 out8(RTC_PORT_DATA, val);
52}
53
54#elif defined(CONFIG_PCIPPC2)
55
56#include "../board/pcippc2/pcippc2.h"
57
58static uchar rtc_read (short reg)
59{
60 return in8(RTC(reg));
61}
62
63static void rtc_write (short reg, uchar val)
64{
65 out8(RTC(reg),val);
66}
67
wdenk452cfd62002-11-19 11:04:11 +000068#elif defined(CONFIG_AMIGAONEG3SE)
69
70#include "../board/MAI/AmigaOneG3SE/via686.h"
71#include "../board/MAI/AmigaOneG3SE/memio.h"
72
73
74static uchar rtc_read (short reg)
75{
76 out_byte(CMOS_ADDR, (uint8)reg);
77 return in_byte(CMOS_DATA);
78}
79
80static void rtc_write (short reg, uchar val)
81{
82 out_byte(CMOS_ADDR, (uint8)reg);
83 out_byte(CMOS_DATA, (uint8)val);
84}
85
wdenk1df49e22002-09-17 21:37:55 +000086#else
87# error Board specific rtc access functions should be supplied
88#endif
89
90static unsigned bcd2bin (uchar n)
91{
92 return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
93}
94
95static unsigned char bin2bcd (unsigned int n)
96{
97 return (((n / 10) << 4) | (n % 10));
98}
99
100/* ------------------------------------------------------------------------- */
101
102void *nvram_read(void *dest, const short src, size_t count)
103{
104 uchar *d = (uchar *) dest;
105 short s = src;
106
107 while (count--)
108 *d++ = rtc_read(s++);
109
110 return dest;
111}
112
113void nvram_write(short dest, const void *src, size_t count)
114{
115 short d = dest;
116 uchar *s = (uchar *) src;
117
118 while (count--)
119 rtc_write(d++, *s++);
120}
121
122#if (CONFIG_COMMANDS & CFG_CMD_DATE)
123
124/* ------------------------------------------------------------------------- */
125
126void rtc_get (struct rtc_time *tmp)
127{
128 uchar save_ctrl_a;
129 uchar sec, min, hour, mday, wday, mon, year;
130
131 /* Simple: freeze the clock, read it and allow updates again */
132 save_ctrl_a = rtc_read(RTC_CONTROLA);
133
134 /* Set the register to read the value. */
135 save_ctrl_a |= RTC_CA_READ;
136 rtc_write(RTC_CONTROLA, save_ctrl_a);
137
138 sec = rtc_read (RTC_SECONDS);
139 min = rtc_read (RTC_MINUTES);
140 hour = rtc_read (RTC_HOURS);
141 mday = rtc_read (RTC_DAY_OF_MONTH);
142 wday = rtc_read (RTC_DAY_OF_WEEK);
143 mon = rtc_read (RTC_MONTH);
144 year = rtc_read (RTC_YEAR);
145
146 /* re-enable update */
147 save_ctrl_a &= ~RTC_CA_READ;
148 rtc_write(RTC_CONTROLA, save_ctrl_a);
149
150#ifdef RTC_DEBUG
151 printf ( "Get RTC year: %02x mon/cent: %02x mday: %02x wday: %02x "
152 "hr: %02x min: %02x sec: %02x\n",
153 year, mon, mday, wday,
154 hour, min, sec );
155#endif
156 tmp->tm_sec = bcd2bin (sec & 0x7F);
157 tmp->tm_min = bcd2bin (min & 0x7F);
158 tmp->tm_hour = bcd2bin (hour & 0x3F);
159 tmp->tm_mday = bcd2bin (mday & 0x3F);
160 tmp->tm_mon = bcd2bin (mon & 0x1F);
161 tmp->tm_year = bcd2bin (year);
162 tmp->tm_wday = bcd2bin (wday & 0x07);
163 if(tmp->tm_year<70)
164 tmp->tm_year+=2000;
165 else
166 tmp->tm_year+=1900;
167 tmp->tm_yday = 0;
168 tmp->tm_isdst= 0;
169#ifdef RTC_DEBUG
170 printf ( "Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
171 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
172 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
173#endif
174}
175
176void rtc_set (struct rtc_time *tmp)
177{
178 uchar save_ctrl_a;
179
180#ifdef RTC_DEBUG
181 printf ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
182 tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
183 tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
184#endif
185 save_ctrl_a = rtc_read(RTC_CONTROLA);
186
187 save_ctrl_a |= RTC_CA_WRITE;
188 rtc_write(RTC_CONTROLA, save_ctrl_a); /* disables the RTC to update the regs */
189
190 rtc_write (RTC_YEAR, bin2bcd(tmp->tm_year % 100));
191 rtc_write (RTC_MONTH, bin2bcd(tmp->tm_mon));
192
193 rtc_write (RTC_DAY_OF_WEEK, bin2bcd(tmp->tm_wday));
194 rtc_write (RTC_DAY_OF_MONTH, bin2bcd(tmp->tm_mday));
195 rtc_write (RTC_HOURS, bin2bcd(tmp->tm_hour));
196 rtc_write (RTC_MINUTES, bin2bcd(tmp->tm_min ));
197 rtc_write (RTC_SECONDS, bin2bcd(tmp->tm_sec ));
198
199 save_ctrl_a &= ~RTC_CA_WRITE;
200 rtc_write(RTC_CONTROLA, save_ctrl_a); /* enables the RTC to update the regs */
201}
202
203void rtc_reset (void)
204{
205 uchar control_b;
206
207 /*
208 * Start oscillator here.
209 */
210 control_b = rtc_read(RTC_CONTROLB);
211
212 control_b &= ~RTC_CB_STOP;
213 rtc_write(RTC_CONTROLB, control_b);
214}
215
216void rtc_set_watchdog(short multi, short res)
217{
218 uchar wd_value;
219
220 wd_value = RTC_WDS | ((multi & 0x1F) << 2) | (res & 0x3);
221 rtc_write(RTC_WATCHDOG, wd_value);
222}
223
224#endif /* (CONFIG_COMMANDS & CFG_CMD_DATE) */
225#endif /* CONFIG_RTC_MK48T59 */