blob: 753575f8687ca4a1ca87d1a285e4d76ad8701633 [file] [log] [blame]
wdenk4a9cbbe2002-08-27 09:48:53 +00001/*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com
5 *
6 * See file CREDITS for list of people who contributed to this
7 * project.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 */
24
25#include <common.h>
26#include <mpc824x.h>
27#include <asm/processor.h>
28#include <asm/pci_io.h>
29#include <commproc.h>
30#include "drivers/epic.h"
31
32/****************************************************************************/
33
34unsigned decrementer_count; /* count val for 1e6/HZ microseconds */
35
36static __inline__ unsigned long get_msr (void)
37{
38 unsigned long msr;
39
40 asm volatile ("mfmsr %0":"=r" (msr):);
41
42 return msr;
43}
44
45static __inline__ void set_msr (unsigned long msr)
46{
47 asm volatile ("mtmsr %0"::"r" (msr));
48}
49
50static __inline__ unsigned long get_dec (void)
51{
52 unsigned long val;
53
54 asm volatile ("mfdec %0":"=r" (val):);
55
56 return val;
57}
58
59
60static __inline__ void set_dec (unsigned long val)
61{
62 asm volatile ("mtdec %0"::"r" (val));
63}
64
65
66void enable_interrupts (void)
67{
68 set_msr (get_msr () | MSR_EE);
69}
70
71/* returns flag if MSR_EE was set before */
72int disable_interrupts (void)
73{
74 ulong msr = get_msr ();
75
76 set_msr (msr & ~MSR_EE);
77 return ((msr & MSR_EE) != 0);
78}
79
80/****************************************************************************/
81
82int interrupt_init (void)
83{
84 decrementer_count = (get_bus_freq (0) / 4) / CFG_HZ;
85
wdenk57b2d802003-06-27 21:31:46 +000086 /*
87 * It's all broken at the moment and I currently don't need
88 * interrupts. If you want to fix it, have a look at the epic
89 * drivers in dink32 v12. They do everthing and Motorola said
90 * I could use the dink source in this project as long as
91 * copyright notices remain intact.
wdenk4a9cbbe2002-08-27 09:48:53 +000092 */
93
94 epicInit (EPIC_DIRECT_IRQ, 0);
wdenkbb444c92002-12-07 00:20:59 +000095 /* EPIC won't generate INT unless Current Task Pri < 15 */
96 epicCurTaskPrioSet(0);
wdenk4a9cbbe2002-08-27 09:48:53 +000097
98 set_dec (decrementer_count);
99
100 set_msr (get_msr () | MSR_EE);
101
102 return (0);
103}
104
105/****************************************************************************/
106
107/*
108 * Handle external interrupts
109 */
110void external_interrupt (struct pt_regs *regs)
111{
112 register unsigned long temp;
113
114 pci_readl (CFG_EUMB_ADDR + EPIC_PROC_INT_ACK_REG, temp);
115 sync (); /* i'm not convinced this is needed, but dink source has it */
116 temp &= 0xff; /*get vector */
117
118 /*TODO: handle them -... */
119 epicEOI ();
120}
121
122/****************************************************************************/
123
124/*
125 * blank int handlers.
126 */
127
128void
129irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
130{
131}
132
133void irq_free_handler (int vec)
134{
135
136}
137
138/*TODO: some handlers for winbond and 87308 interrupts
139 and what about generic pci inteerupts?
140 vga?
141 */
142
143volatile ulong timestamp = 0;
144
145void timer_interrupt (struct pt_regs *regs)
146{
147 /* Restore Decrementer Count */
148 set_dec (decrementer_count);
149
150 timestamp++;
151
152#if defined(CONFIG_WATCHDOG)
153 if ((timestamp % (CFG_HZ / 2)) == 0) {
154#if defined(CONFIG_OXC)
155 {
156 extern void oxc_wdt_reset (void);
157
158 oxc_wdt_reset ();
159 }
160#endif
161 }
162#endif /* CONFIG_WATCHDOG */
163#if defined(CONFIG_SHOW_ACTIVITY) && defined(CONFIG_OXC)
164 if ((timestamp % (CFG_HZ / 10)) == 0) {
165 {
166 extern void oxc_toggle_activeled (void);
167
168 oxc_toggle_activeled ();
169 }
170 }
171#endif
172}
173
174void reset_timer (void)
175{
176 timestamp = 0;
177}
178
179ulong get_timer (ulong base)
180{
181 return (timestamp - base);
182}
183
184void set_timer (ulong t)
185{
186 timestamp = t;
187}