| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Adrian Alonso | 9072cb2 | 2015-08-11 11:19:49 -0500 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2015 Freescale Semiconductor, Inc |
| 4 | * Peng Fan <Peng.Fan@freescale.com> |
| Adrian Alonso | 9072cb2 | 2015-08-11 11:19:49 -0500 | [diff] [blame] | 5 | */ |
| 6 | #ifndef __PFUZE3000_PMIC_H_ |
| 7 | #define __PFUZE3000_PMIC_H_ |
| 8 | |
| 9 | /* PFUZE3000 registers */ |
| 10 | enum { |
| 11 | PFUZE3000_DEVICEID = 0x00, |
| 12 | |
| 13 | PFUZE3000_REVID = 0x03, |
| 14 | PFUZE3000_FABID = 0x04, |
| 15 | PFUZE3000_INTSTAT0 = 0x05, |
| 16 | PFUZE3000_INTMASK0 = 0x06, |
| 17 | PFUZE3000_INTSENSE0 = 0x07, |
| 18 | PFUZE3000_INTSTAT1 = 0x08, |
| 19 | PFUZE3000_INTMASK1 = 0x09, |
| 20 | PFUZE3000_INTSENSE1 = 0x0A, |
| 21 | |
| 22 | PFUZE3000_INTSTAT3 = 0x0E, |
| 23 | PFUZE3000_INTMASK3 = 0x0F, |
| 24 | PFUZE3000_INTSENSE3 = 0x10, |
| 25 | PFUZE3000_INTSTAT4 = 0x11, |
| 26 | PFUZE3000_INTMASK4 = 0x12, |
| 27 | PFUZE3000_INTSENSE4 = 0x13, |
| 28 | |
| 29 | PFUZE3000_COINCTL = 0x1A, |
| 30 | PFUZE3000_PWRCTL = 0x1B, |
| 31 | PFUZE3000_MEMA = 0x1C, |
| 32 | PFUZE3000_MEMB = 0x1D, |
| 33 | PFUZE3000_MEMC = 0x1E, |
| 34 | PFUZE3000_MEMD = 0x1F, |
| 35 | |
| 36 | PFUZE3000_SW1AVOLT = 0x20, |
| 37 | PFUZE3000_SW1ASTBY = 0x21, |
| 38 | PFUZE3000_SW1AOFF = 0x22, |
| 39 | PFUZE3000_SW1AMODE = 0x23, |
| 40 | PFUZE3000_SW1ACONF = 0x24, |
| 41 | |
| 42 | PFUZE3000_SW1BVOLT = 0x2E, |
| 43 | PFUZE3000_SW1BSTBY = 0x2F, |
| 44 | PFUZE3000_SW1BOFF = 0x30, |
| 45 | PFUZE3000_SW1BMODE = 0x31, |
| 46 | PFUZE3000_SW1BCONF = 0x32, |
| 47 | |
| 48 | PFUZE3000_SW2VOLT = 0x35, |
| 49 | PFUZE3000_SW2STBY = 0x36, |
| 50 | PFUZE3000_SW2OFF = 0x37, |
| 51 | PFUZE3000_SW2MODE = 0x38, |
| 52 | PFUZE3000_SW2CONF = 0x39, |
| 53 | |
| 54 | PFUZE3000_SW3VOLT = 0x3C, |
| 55 | PFUZE3000_SW3STBY = 0x3D, |
| 56 | PFUZE3000_SW3OFF = 0x3E, |
| 57 | PFUZE3000_SW3MODE = 0x3F, |
| 58 | PFUZE3000_SW3CONF = 0x40, |
| 59 | |
| 60 | PFUZE3000_SWBSTCTL = 0x66, |
| 61 | |
| 62 | PFUZE3000_LDOGCTL = 0x69, |
| 63 | PFUZE3000_VREFDDRCTL = 0x6A, |
| 64 | PFUZE3000_VSNVSCTL = 0x6B, |
| 65 | PFUZE3000_VLDO1CTL = 0x6C, |
| 66 | PFUZE3000_VLDO2CTL = 0x6D, |
| 67 | PFUZE3000_VCC_SDCTL = 0x6E, |
| 68 | PFUZE3000_V33CTL = 0x6F, |
| 69 | PFUZE3000_VLDO3CTL = 0x70, |
| 70 | PFUZE3000_VLD4CTL = 0x71, |
| 71 | |
| Trent Piepho | 3713c9b | 2018-04-25 10:06:00 -0700 | [diff] [blame] | 72 | PFUZE3000_NUM_OF_REGS = 0x100, |
| Adrian Alonso | 9072cb2 | 2015-08-11 11:19:49 -0500 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | int power_pfuze3000_init(unsigned char bus); |
| 76 | |
| Breno Lima | 70683b5 | 2016-12-06 15:38:24 -0200 | [diff] [blame] | 77 | /* Voltage Configuration */ |
| 78 | #define PFUZE3000_SW1AB_SETP(x) ((x - 7000) / 250) |
| 79 | #define PFUZE3000_SW3_SETP(x) ((x - 9000) / 500) |
| 80 | #define PFUZE3000_VLDO_SETP(x) ((x - 8000) / 500) |
| 81 | |
| Adrian Alonso | 9072cb2 | 2015-08-11 11:19:49 -0500 | [diff] [blame] | 82 | #endif |