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Mingkai Hu5fbc7cf2009-09-22 14:53:21 +08001/*
2 * Copyright 2009 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
23#include <common.h>
Dipen Dudhat9eae0832011-03-22 09:27:39 +053024#include <asm/fsl_ifc.h>
Mingkai Hu5fbc7cf2009-09-22 14:53:21 +080025#include <asm/io.h>
26
27void cpu_init_f(void)
28{
Mingkai Hu5fbc7cf2009-09-22 14:53:21 +080029#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR)
30 ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
Mingkai Hu5fbc7cf2009-09-22 14:53:21 +080031
32 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
33
34 /* set MBECCDIS=1, SBECCDIS=1 */
35 out_be32(&l2cache->l2errdis,
36 (MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
37
38 /* set L2E=1 & L2SRAM=001 */
39 out_be32(&l2cache->l2ctl,
40 (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
Mingkai Hu5fbc7cf2009-09-22 14:53:21 +080041#endif
42}