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Wolfgang Denkadf20a12005-09-25 01:48:28 +02001/*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02008 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
Detlev Zundelf1b3f2b2009-05-13 10:54:10 +020010 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
Wolfgang Denkadf20a12005-09-25 01:48:28 +020011 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
Albert ARIBAUD340983d2011-04-22 19:41:02 +020013 * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net>
Wolfgang Denkadf20a12005-09-25 01:48:28 +020014 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
Wolfgang Denk0191e472010-10-26 14:34:52 +020034#include <asm-offsets.h>
Wolfgang Denkadf20a12005-09-25 01:48:28 +020035#include <config.h>
36#include <version.h>
37
38/*
39 *************************************************************************
40 *
41 * Jump vector table as in table 3.1 in [1]
42 *
43 *************************************************************************
44 */
45
46
47.globl _start
48_start:
49 b reset
50 ldr pc, _undefined_instruction
51 ldr pc, _software_interrupt
52 ldr pc, _prefetch_abort
53 ldr pc, _data_abort
54 ldr pc, _not_used
55 ldr pc, _irq
56 ldr pc, _fiq
57
58_undefined_instruction:
59 .word undefined_instruction
60_software_interrupt:
61 .word software_interrupt
62_prefetch_abort:
63 .word prefetch_abort
64_data_abort:
65 .word data_abort
66_not_used:
67 .word not_used
68_irq:
69 .word irq
70_fiq:
71 .word fiq
72
73 .balignl 16,0xdeadbeef
74
Albert Aribaud126897e2010-11-25 22:45:02 +010075_vectors_end:
Wolfgang Denkadf20a12005-09-25 01:48:28 +020076
77/*
78 *************************************************************************
79 *
80 * Startup Code (reset vector)
81 *
82 * do important init only if we don't start from memory!
83 * setup Memory and board specific bits prior to relocation.
84 * relocate armboot to ram
85 * setup stack
86 *
87 *************************************************************************
88 */
89
Heiko Schocher68c4d2e2010-09-17 13:10:45 +020090.globl _TEXT_BASE
Wolfgang Denkadf20a12005-09-25 01:48:28 +020091_TEXT_BASE:
Wolfgang Denk0708bc62010-10-07 21:51:12 +020092 .word CONFIG_SYS_TEXT_BASE
Wolfgang Denkadf20a12005-09-25 01:48:28 +020093
Wolfgang Denkadf20a12005-09-25 01:48:28 +020094/*
95 * These are defined in the board-specific linker script.
Albert Aribaud126897e2010-11-25 22:45:02 +010096 * Subtracting _start from them lets the linker put their
97 * relative position in the executable instead of leaving
98 * them null.
Wolfgang Denkadf20a12005-09-25 01:48:28 +020099 */
Albert Aribaud126897e2010-11-25 22:45:02 +0100100.globl _bss_start_ofs
101_bss_start_ofs:
102 .word __bss_start - _start
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200103
Albert Aribaud126897e2010-11-25 22:45:02 +0100104.globl _bss_end_ofs
105_bss_end_ofs:
Po-Yu Chuangcedbf4b2011-03-01 22:59:59 +0000106 .word __bss_end__ - _start
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200107
Po-Yu Chuang1864b002011-03-01 23:02:04 +0000108.globl _end_ofs
109_end_ofs:
110 .word _end - _start
111
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200112#ifdef CONFIG_USE_IRQ
113/* IRQ stack memory (calculated at run-time) */
114.globl IRQ_STACK_START
115IRQ_STACK_START:
116 .word 0x0badc0de
117
118/* IRQ stack memory (calculated at run-time) */
119.globl FIQ_STACK_START
120FIQ_STACK_START:
121 .word 0x0badc0de
122#endif
123
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200124/* IRQ stack memory (calculated at run-time) + 8 bytes */
125.globl IRQ_STACK_START_IN
126IRQ_STACK_START_IN:
127 .word 0x0badc0de
128
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200129/*
130 * the actual reset code
131 */
132
133reset:
134 /*
135 * set the cpu to SVC32 mode
136 */
137 mrs r0,cpsr
138 bic r0,r0,#0x1f
139 orr r0,r0,#0xd3
140 msr cpsr,r0
141
142 /*
143 * we do sys-critical inits only at reboot,
144 * not when booting from ram!
145 */
146#ifndef CONFIG_SKIP_LOWLEVEL_INIT
147 bl cpu_init_crit
148#endif
149
150/* Set stackpointer in internal RAM to call board_init_f */
151call_board_init_f:
152 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
Heiko Schocher17f288a2010-11-12 07:53:55 +0100153 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200154 ldr r0,=0x00000000
155 bl board_init_f
156
157/*------------------------------------------------------------------------------*/
158
159/*
160 * void relocate_code (addr_sp, gd, addr_moni)
161 *
162 * This "function" does not return, instead it continues in RAM
163 * after relocating the monitor code.
164 *
165 */
166 .globl relocate_code
167relocate_code:
168 mov r4, r0 /* save addr_sp */
169 mov r5, r1 /* save addr of gd */
170 mov r6, r2 /* save addr of destination */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200171
172 /* Set up the stack */
173stack_setup:
174 mov sp, r4
175
176 adr r0, _start
Andreas Bießmann007b38f2010-12-01 00:58:34 +0100177 cmp r0, r6
178 beq clear_bss /* skip relocation */
Andreas Bießmann8cfbda92010-12-01 00:58:33 +0100179 mov r1, r6 /* r1 <- scratch for copy_loop */
Albert Aribaud126897e2010-11-25 22:45:02 +0100180 ldr r3, _bss_start_ofs
181 add r2, r0, r3 /* r2 <- source end address */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200182
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200183copy_loop:
184 ldmia r0!, {r9-r10} /* copy from source address [r0] */
Andreas Bießmann8cfbda92010-12-01 00:58:33 +0100185 stmia r1!, {r9-r10} /* copy to target address [r1] */
Albert Aribaud0668d162010-10-05 16:06:39 +0200186 cmp r0, r2 /* until source end address [r2] */
187 blo copy_loop
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200188
Aneesh V552a3192011-07-13 05:11:07 +0000189#ifndef CONFIG_SPL_BUILD
Albert Aribaud126897e2010-11-25 22:45:02 +0100190 /*
191 * fix .rel.dyn relocations
192 */
193 ldr r0, _TEXT_BASE /* r0 <- Text base */
Andreas Bießmann8cfbda92010-12-01 00:58:33 +0100194 sub r9, r6, r0 /* r9 <- relocation offset */
Albert Aribaud126897e2010-11-25 22:45:02 +0100195 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
196 add r10, r10, r0 /* r10 <- sym table in FLASH */
197 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
198 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
199 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
200 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200201fixloop:
Albert Aribaud126897e2010-11-25 22:45:02 +0100202 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
203 add r0, r0, r9 /* r0 <- location to fix up in RAM */
204 ldr r1, [r2, #4]
Andreas Bießmann318cea12010-12-01 00:58:35 +0100205 and r7, r1, #0xff
206 cmp r7, #23 /* relative fixup? */
Albert Aribaud126897e2010-11-25 22:45:02 +0100207 beq fixrel
Andreas Bießmann318cea12010-12-01 00:58:35 +0100208 cmp r7, #2 /* absolute fixup? */
Albert Aribaud126897e2010-11-25 22:45:02 +0100209 beq fixabs
210 /* ignore unknown type of fixup */
211 b fixnext
212fixabs:
213 /* absolute fix: set location to (offset) symbol value */
214 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
215 add r1, r10, r1 /* r1 <- address of symbol in table */
216 ldr r1, [r1, #4] /* r1 <- symbol value */
Wolfgang Denk899cdd12010-12-09 11:26:24 +0100217 add r1, r1, r9 /* r1 <- relocated sym addr */
Albert Aribaud126897e2010-11-25 22:45:02 +0100218 b fixnext
219fixrel:
220 /* relative fix: increase location by offset */
221 ldr r1, [r0]
222 add r1, r1, r9
223fixnext:
224 str r1, [r0]
225 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200226 cmp r2, r3
Wolfgang Denk98dd07c2010-10-23 23:22:38 +0200227 blo fixloop
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200228#endif
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200229
230clear_bss:
Aneesh V552a3192011-07-13 05:11:07 +0000231#ifndef CONFIG_SPL_BUILD
Albert Aribaud126897e2010-11-25 22:45:02 +0100232 ldr r0, _bss_start_ofs
233 ldr r1, _bss_end_ofs
Andreas Bießmann8cfbda92010-12-01 00:58:33 +0100234 mov r4, r6 /* reloc addr */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200235 add r0, r0, r4
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200236 add r1, r1, r4
237 mov r2, #0x00000000 /* clear */
238
Zhong Hongbo1a324a52012-07-07 03:24:33 +0000239clbss_l:cmp r0, r1 /* clear loop... */
240 bhs clbss_e /* if reached end of bss, exit */
241 str r2, [r0]
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200242 add r0, r0, #4
Zhong Hongbo1a324a52012-07-07 03:24:33 +0000243 b clbss_l
244clbss_e:
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200245#endif
246
247/*
248 * We are done. Do not return, instead branch to second part of board
249 * initialization, now running from RAM.
250 */
251#ifdef CONFIG_NAND_SPL
252 ldr pc, _nand_boot
253
254_nand_boot: .word nand_boot
255#else
Albert Aribaud126897e2010-11-25 22:45:02 +0100256 ldr r0, _board_init_r_ofs
257 adr r1, _start
258 add lr, r0, r1
259 add lr, lr, r9
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200260 /* setup parameters for board_init_r */
261 mov r0, r5 /* gd_t */
Andreas Bießmann8cfbda92010-12-01 00:58:33 +0100262 mov r1, r6 /* dest_addr */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200263 /* jump to it ... */
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200264 mov pc, lr
265
Albert Aribaud126897e2010-11-25 22:45:02 +0100266_board_init_r_ofs:
267 .word board_init_r - _start
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200268#endif
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200269
Albert Aribaud126897e2010-11-25 22:45:02 +0100270_rel_dyn_start_ofs:
271 .word __rel_dyn_start - _start
272_rel_dyn_end_ofs:
273 .word __rel_dyn_end - _start
274_dynsym_start_ofs:
275 .word __dynsym_start - _start
276
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200277/*
278 *************************************************************************
279 *
280 * CPU_init_critical registers
281 *
282 * setup important registers
283 * setup memory timing
284 *
285 *************************************************************************
286 */
287
288
Jean-Christophe PLAGNIOL-VILLARD314b7282009-05-15 23:45:20 +0200289#ifndef CONFIG_SKIP_LOWLEVEL_INIT
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200290cpu_init_crit:
291 /*
292 * flush v4 I/D caches
293 */
294 mov r0, #0
295 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
296 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
297
298 /*
299 * disable MMU stuff and caches
300 */
301 mrc p15, 0, r0, c1, c0, 0
302 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
303 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
304 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
305 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
306 mcr p15, 0, r0, c1, c0, 0
307
308 /*
309 * Go setup Memory and board specific bits prior to relocation.
310 */
311 mov ip, lr /* perserve link reg across call */
Wolfgang Denk7f88a5e2005-10-06 17:08:18 +0200312 bl lowlevel_init /* go setup memory */
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200313 mov lr, ip /* restore link */
314 mov pc, lr /* back to my caller */
Jean-Christophe PLAGNIOL-VILLARD314b7282009-05-15 23:45:20 +0200315#endif
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200316/*
317 *************************************************************************
318 *
319 * Interrupt handling
320 *
321 *************************************************************************
322 */
323
324@
325@ IRQ stack frame.
326@
327#define S_FRAME_SIZE 72
328
329#define S_OLD_R0 68
330#define S_PSR 64
331#define S_PC 60
332#define S_LR 56
333#define S_SP 52
334
335#define S_IP 48
336#define S_FP 44
337#define S_R10 40
338#define S_R9 36
339#define S_R8 32
340#define S_R7 28
341#define S_R6 24
342#define S_R5 20
343#define S_R4 16
344#define S_R3 12
345#define S_R2 8
346#define S_R1 4
347#define S_R0 0
348
349#define MODE_SVC 0x13
350#define I_BIT 0x80
351
352/*
353 * use bad_save_user_regs for abort/prefetch/undef/swi ...
354 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
355 */
356
357 .macro bad_save_user_regs
358 @ carve out a frame on current user stack
359 sub sp, sp, #S_FRAME_SIZE
360 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
361
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200362 ldr r2, IRQ_STACK_START_IN
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200363 @ get values for "aborted" pc and cpsr (into parm regs)
364 ldmia r2, {r2 - r3}
365 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
366 add r5, sp, #S_SP
367 mov r1, lr
368 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
369 mov r0, sp @ save current stack into r0 (param register)
370 .endm
371
372 .macro irq_save_user_regs
373 sub sp, sp, #S_FRAME_SIZE
374 stmia sp, {r0 - r12} @ Calling r0-r12
375 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
376 add r8, sp, #S_PC
377 stmdb r8, {sp, lr}^ @ Calling SP, LR
378 str lr, [r8, #0] @ Save calling PC
379 mrs r6, spsr
380 str r6, [r8, #4] @ Save CPSR
381 str r0, [r8, #8] @ Save OLD_R0
382 mov r0, sp
383 .endm
384
385 .macro irq_restore_user_regs
386 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
387 mov r0, r0
388 ldr lr, [sp, #S_PC] @ Get PC
389 add sp, sp, #S_FRAME_SIZE
390 subs pc, lr, #4 @ return & move spsr_svc into cpsr
391 .endm
392
393 .macro get_bad_stack
Heiko Schocher68c4d2e2010-09-17 13:10:45 +0200394 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200395
396 str lr, [r13] @ save caller lr in position 0 of saved stack
397 mrs lr, spsr @ get the spsr
398 str lr, [r13, #4] @ save spsr in position 1 of saved stack
399 mov r13, #MODE_SVC @ prepare SVC-Mode
400 @ msr spsr_c, r13
401 msr spsr, r13 @ switch modes, make sure moves will execute
402 mov lr, pc @ capture return pc
403 movs pc, lr @ jump to next instruction & switch modes.
404 .endm
405
406 .macro get_irq_stack @ setup IRQ stack
407 ldr sp, IRQ_STACK_START
408 .endm
409
410 .macro get_fiq_stack @ setup FIQ stack
411 ldr sp, FIQ_STACK_START
412 .endm
413
414/*
415 * exception handlers
416 */
417 .align 5
418undefined_instruction:
419 get_bad_stack
420 bad_save_user_regs
421 bl do_undefined_instruction
422
423 .align 5
424software_interrupt:
425 get_bad_stack
426 bad_save_user_regs
427 bl do_software_interrupt
428
429 .align 5
430prefetch_abort:
431 get_bad_stack
432 bad_save_user_regs
433 bl do_prefetch_abort
434
435 .align 5
436data_abort:
437 get_bad_stack
438 bad_save_user_regs
439 bl do_data_abort
440
441 .align 5
442not_used:
443 get_bad_stack
444 bad_save_user_regs
445 bl do_not_used
446
447#ifdef CONFIG_USE_IRQ
448
449 .align 5
450irq:
451 get_irq_stack
452 irq_save_user_regs
Wolfgang Denka1be4762008-05-20 16:00:29 +0200453 bl do_irq
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200454 irq_restore_user_regs
455
456 .align 5
457fiq:
458 get_fiq_stack
459 /* someone ought to write a more effiction fiq_save_user_regs */
460 irq_save_user_regs
Wolfgang Denka1be4762008-05-20 16:00:29 +0200461 bl do_fiq
Wolfgang Denkadf20a12005-09-25 01:48:28 +0200462 irq_restore_user_regs
463
464#else
465
466 .align 5
467irq:
468 get_bad_stack
469 bad_save_user_regs
470 bl do_irq
471
472 .align 5
473fiq:
474 get_bad_stack
475 bad_save_user_regs
476 bl do_fiq
477
478#endif
479
480# ifdef CONFIG_INTEGRATOR
481
482 /* Satisfied by general board level routine */
483
484#else
485
486 .align 5
487.globl reset_cpu
488reset_cpu:
489
490 ldr r1, rstctl1 /* get clkm1 reset ctl */
491 mov r3, #0x0
492 strh r3, [r1] /* clear it */
493 mov r3, #0x8
494 strh r3, [r1] /* force dsp+arm reset */
495_loop_forever:
496 b _loop_forever
497
498rstctl1:
499 .word 0xfffece10
500
501#endif /* #ifdef CONFIG_INTEGRATOR */