blob: b6960b07bcffab0b80ae2b99a5dc345a67da8fc0 [file] [log] [blame]
Heiko Stübner594684f2017-02-18 19:46:33 +01001/*
2 * Copyright (c) 2014 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
9#define _DT_BINDINGS_CLK_ROCKCHIP_RK3188_H
10
11#include <dt-bindings/clock/rk3188-cru-common.h>
12
13/* soft-reset indices */
14#define SRST_PTM_CORE2 0
15#define SRST_PTM_CORE3 1
16#define SRST_CORE2 5
17#define SRST_CORE3 6
18#define SRST_CORE2_DBG 10
19#define SRST_CORE3_DBG 11
20
21#define SRST_TIMER2 16
22#define SRST_TIMER4 23
23#define SRST_I2S0 24
24#define SRST_TIMER5 25
25#define SRST_TIMER3 29
26#define SRST_TIMER6 31
27
28#define SRST_PTM3 36
29#define SRST_PTM3_ATB 37
30
31#define SRST_GPS 67
32#define SRST_HSICPHY 75
33#define SRST_TIMER 78
34
35#define SRST_PTM2 92
36#define SRST_CORE2_WDT 94
37#define SRST_CORE3_WDT 95
38
39#define SRST_PTM2_ATB 111
40
41#define SRST_HSIC 117
42#define SRST_CTI2 118
43#define SRST_CTI2_APB 119
44#define SRST_GPU_BRIDGE 121
45#define SRST_CTI3 123
46#define SRST_CTI3_APB 124
47
48#endif