blob: 86b10400ffaca083f0f4b6acf412da497571386b [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -07002/*
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +02003 * Copyright (c) 2016-2018 Toradex, Inc.
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -07004 */
5
6#include <common.h>
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +02007#include <dm.h>
Simon Glassed38aef2020-05-10 11:40:03 -06008#include <env.h>
Simon Glass97589732020-05-10 11:40:02 -06009#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -060010#include <log.h>
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -070011#include <asm/arch-tegra/ap.h>
12#include <asm/gpio.h>
13#include <asm/io.h>
14#include <asm/arch/gpio.h>
15#include <asm/arch/pinmux.h>
Simon Glass9d1f6192019-08-02 09:44:25 -060016#include <env_internal.h>
Marcel Ziswiler61c99fe2022-05-21 12:42:46 +020017#include <fdt_support.h>
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +020018#include <pci_tegra.h>
Simon Glassdbd79542020-05-10 11:40:11 -060019#include <linux/delay.h>
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -070020#include <power/as3722.h>
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +020021#include <power/pmic.h>
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -070022
23#include "../common/tdx-common.h"
24#include "pinmux-config-apalis-tk1.h"
25
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +020026#define LAN_DEV_OFF_N TEGRA_GPIO(O, 6)
27#define LAN_RESET_N TEGRA_GPIO(S, 2)
Igor Opaniukfeb8c0d2019-08-01 11:06:32 +030028#define FAN_EN TEGRA_GPIO(DD, 2)
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +020029#define LAN_WAKE_N TEGRA_GPIO(O, 5)
30#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
31#define PEX_PERST_N TEGRA_GPIO(DD, 1) /* Apalis GPIO7 */
32#define RESET_MOCI_CTRL TEGRA_GPIO(U, 4)
33#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
Marcel Ziswiler46eb7292019-08-09 13:21:46 +030034#define VCC_USBH TEGRA_GPIO(T, 6)
35#define VCC_USBH_V1_0 TEGRA_GPIO(N, 5)
36#define VCC_USBO1 TEGRA_GPIO(T, 5)
37#define VCC_USBO1_V1_0 TEGRA_GPIO(N, 4)
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -070038
39int arch_misc_init(void)
40{
41 if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
Marcel Ziswiler55fb0572021-08-11 15:12:56 +020042 NVBOOTTYPE_RECOVERY) {
43 printf("USB recovery mode, attempting to boot Toradex Easy "
44 "Installer\n");
45 env_set("bootdelay", "-2");
46 env_set("defargs", "pcie_aspm=off user_debug=30");
47 env_set("fdt_high", "");
48 env_set("initrd_high", "");
49
50 env_set("setup", "env set setupargs igb_mac=${ethaddr} "
51 "consoleblank=0 no_console_suspend=1 "
52 "console=${console},${baudrate}n8 ${memargs}");
53 env_set("teziargs", "rootfstype=squashfs root=/dev/ram quiet "
54 "autoinstall");
55 env_set("vidargs", "video=HDMI-A-1:640x480-16@60D");
56 env_set("bootcmd", "run setup; env set bootargs ${defargs} "
57 "${setupargs} ${vidargs} ${teziargs}; bootm 0x80208000"
58 "#config@${soc}-${fdt_module}-${fdt_board}.dtb");
59 }
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -070060
Marcel Ziswiler46eb7292019-08-09 13:21:46 +030061 /* PCB Version Indication: V1.2 and later have GPIO_PV0 wired to GND */
62 gpio_request(TEGRA_GPIO(V, 0), "PCB Version Indication");
63 gpio_direction_input(TEGRA_GPIO(V, 0));
64 if (gpio_get_value(TEGRA_GPIO(V, 0))) {
65 /*
66 * if using the default device tree for new V1.2 and later HW,
67 * use version for older V1.0 and V1.1 HW
68 */
69 char *fdt_env = env_get("fdt_module");
70
71 if (fdt_env && !strcmp(FDT_MODULE, fdt_env)) {
72 env_set("fdt_module", FDT_MODULE_V1_0);
73 printf("patching fdt_module to " FDT_MODULE_V1_0
74 " for older V1.0 and V1.1 HW\n");
Marcel Ziswiler46eb7292019-08-09 13:21:46 +030075 }
76
77 /* activate USB power enable GPIOs */
78 gpio_request(VCC_USBH_V1_0, "VCC_USBH");
79 gpio_direction_output(VCC_USBH_V1_0, 1);
80 gpio_request(VCC_USBO1_V1_0, "VCC_USBO1");
81 gpio_direction_output(VCC_USBO1_V1_0, 1);
82 } else {
83 /* activate USB power enable GPIOs */
84 gpio_request(VCC_USBH, "VCC_USBH");
85 gpio_direction_output(VCC_USBH, 1);
86 gpio_request(VCC_USBO1, "VCC_USBO1");
87 gpio_direction_output(VCC_USBO1, 1);
88 }
89
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -070090 return 0;
91}
92
93int checkboard(void)
94{
95 puts("Model: Toradex Apalis TK1 2GB\n");
96
97 return 0;
98}
99
100#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +0900101int ft_board_setup(void *blob, struct bd_info *bd)
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700102{
Marcel Ziswiler61c99fe2022-05-21 12:42:46 +0200103 u8 enetaddr[6];
104
105 /* MAC addr */
106 if (eth_env_get_enetaddr("ethaddr", enetaddr)) {
107 int err = fdt_find_and_setprop(blob,
108 "/pcie@1003000/pci@2,0/ethernet@0,0",
109 "local-mac-address", enetaddr, 6, 0);
110
111 /* Older device trees might have used a different node name */
112 if (err < 0)
113 err = fdt_find_and_setprop(blob,
114 "/pcie@1003000/pci@2,0/pcie@0",
115 "local-mac-address", enetaddr, 6, 0);
116
117 if (err >= 0)
118 puts(" MAC address updated...\n");
119 }
120
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700121 return ft_common_board_setup(blob, bd);
122}
123#endif
124
125/*
126 * Routine: pinmux_init
127 * Description: Do individual peripheral pinmux configs
128 */
129void pinmux_init(void)
130{
131 pinmux_clear_tristate_input_clamping();
132
133 gpio_config_table(apalis_tk1_gpio_inits,
134 ARRAY_SIZE(apalis_tk1_gpio_inits));
135
136 pinmux_config_pingrp_table(apalis_tk1_pingrps,
137 ARRAY_SIZE(apalis_tk1_pingrps));
138
139 pinmux_config_drvgrp_table(apalis_tk1_drvgrps,
140 ARRAY_SIZE(apalis_tk1_drvgrps));
141}
142
143#ifdef CONFIG_PCI_TEGRA
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200144/* TODO: Convert to driver model */
145static int as3722_sd_enable(struct udevice *pmic, unsigned int sd)
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700146{
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700147 int err;
148
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200149 if (sd > 6)
150 return -EINVAL;
151
152 err = pmic_clrsetbits(pmic, AS3722_SD_CONTROL, 0, 1 << sd);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700153 if (err) {
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200154 pr_err("failed to update SD control register: %d", err);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700155 return err;
156 }
157
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200158 return 0;
159}
160
161/* TODO: Convert to driver model */
162static int as3722_ldo_enable(struct udevice *pmic, unsigned int ldo)
163{
164 int err;
165 u8 ctrl_reg = AS3722_LDO_CONTROL0;
166
167 if (ldo > 11)
168 return -EINVAL;
169
170 if (ldo > 7) {
171 ctrl_reg = AS3722_LDO_CONTROL1;
172 ldo -= 8;
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700173 }
174
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200175 err = pmic_clrsetbits(pmic, ctrl_reg, 0, 1 << ldo);
176 if (err) {
177 pr_err("failed to update LDO control register: %d", err);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700178 return err;
179 }
180
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200181 return 0;
182}
183
184int tegra_pcie_board_init(void)
185{
186 struct udevice *dev;
187 int ret;
188
189 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700190 DM_DRIVER_GET(pmic_as3722), &dev);
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200191 if (ret) {
192 pr_err("failed to find AS3722 PMIC: %d\n", ret);
193 return ret;
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700194 }
195
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200196 ret = as3722_sd_enable(dev, 4);
197 if (ret < 0) {
198 pr_err("failed to enable SD4: %d\n", ret);
199 return ret;
200 }
201
202 ret = as3722_sd_set_voltage(dev, 4, 0x24);
203 if (ret < 0) {
204 pr_err("failed to set SD4 voltage: %d\n", ret);
205 return ret;
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700206 }
207
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200208 gpio_request(LAN_DEV_OFF_N, "LAN_DEV_OFF_N");
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700209 gpio_request(LAN_RESET_N, "LAN_RESET_N");
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200210 gpio_request(LAN_WAKE_N, "LAN_WAKE_N");
211
212#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
213 gpio_request(PEX_PERST_N, "PEX_PERST_N");
214 gpio_request(RESET_MOCI_CTRL, "RESET_MOCI_CTRL");
215#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700216
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200217 return 0;
218}
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700219
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200220void tegra_pcie_board_port_reset(struct tegra_pcie_port *port)
221{
222 int index = tegra_pcie_port_index_of_port(port);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700223
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200224 if (index == 1) { /* I210 Gigabit Ethernet Controller (On-module) */
225 struct udevice *dev;
226 int ret;
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700227
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200228 ret = uclass_get_device_by_driver(UCLASS_PMIC,
Simon Glass65130cd2020-12-28 20:34:56 -0700229 DM_DRIVER_GET(pmic_as3722),
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200230 &dev);
231 if (ret) {
232 debug("%s: Failed to find PMIC\n", __func__);
233 return;
234 }
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700235
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200236 /* Reset I210 Gigabit Ethernet Controller */
237 gpio_direction_output(LAN_RESET_N, 0);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700238
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200239 /*
240 * Make sure we don't get any back feeding from DEV_OFF_N resp.
241 * LAN_WAKE_N
242 */
243 gpio_direction_output(LAN_DEV_OFF_N, 0);
244 gpio_direction_output(LAN_WAKE_N, 0);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700245
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200246 /* Make sure LDO9 and LDO10 are initially enabled @ 0V */
247 ret = as3722_ldo_enable(dev, 9);
248 if (ret < 0) {
249 pr_err("failed to enable LDO9: %d\n", ret);
250 return;
251 }
252 ret = as3722_ldo_enable(dev, 10);
253 if (ret < 0) {
254 pr_err("failed to enable LDO10: %d\n", ret);
255 return;
256 }
257 ret = as3722_ldo_set_voltage(dev, 9, 0x80);
258 if (ret < 0) {
259 pr_err("failed to set LDO9 voltage: %d\n", ret);
260 return;
261 }
262 ret = as3722_ldo_set_voltage(dev, 10, 0x80);
263 if (ret < 0) {
264 pr_err("failed to set LDO10 voltage: %d\n", ret);
265 return;
266 }
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700267
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200268 /* Make sure controller gets enabled by disabling DEV_OFF_N */
269 gpio_set_value(LAN_DEV_OFF_N, 1);
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700270
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200271 /*
272 * Enable LDO9 and LDO10 for +V3.3_ETH on patched prototype
273 * V1.0A and sample V1.0B and newer modules
274 */
275 ret = as3722_ldo_set_voltage(dev, 9, 0xff);
276 if (ret < 0) {
277 pr_err("failed to set LDO9 voltage: %d\n", ret);
278 return;
279 }
280 ret = as3722_ldo_set_voltage(dev, 10, 0xff);
281 if (ret < 0) {
282 pr_err("failed to set LDO10 voltage: %d\n", ret);
283 return;
284 }
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700285
Marcel Ziswiler07ce1a62018-05-08 17:34:11 +0200286 /*
287 * Must be asserted for 100 ms after power and clocks are stable
288 */
289 mdelay(100);
290
291 gpio_set_value(LAN_RESET_N, 1);
292 } else if (index == 0) { /* Apalis PCIe */
293#ifdef CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT
294 /*
295 * Reset PLX PEX 8605 PCIe Switch plus PCIe devices on Apalis
296 * Evaluation Board
297 */
298 gpio_direction_output(PEX_PERST_N, 0);
299 gpio_direction_output(RESET_MOCI_CTRL, 0);
300
301 /*
302 * Must be asserted for 100 ms after power and clocks are stable
303 */
304 mdelay(100);
305
306 gpio_set_value(PEX_PERST_N, 1);
307 /*
308 * Err_5: PEX_REFCLK_OUTpx/nx Clock Outputs is not Guaranteed
309 * Until 900 us After PEX_PERST# De-assertion
310 */
311 mdelay(1);
312 gpio_set_value(RESET_MOCI_CTRL, 1);
313#endif /* CONFIG_APALIS_TK1_PCIE_EVALBOARD_INIT */
314 }
Marcel Ziswilerd2b64bd2017-04-01 15:43:16 -0700315}
316#endif /* CONFIG_PCI_TEGRA */
Gerard Salvatella108d7392018-11-19 15:54:10 +0100317
318/*
Igor Opaniukfeb8c0d2019-08-01 11:06:32 +0300319 * Enable/start PWM CPU fan
320 */
321void start_cpu_fan(void)
322{
323 gpio_request(FAN_EN, "FAN_EN");
324 gpio_direction_output(FAN_EN, 1);
325}
326
327/*
Gerard Salvatella108d7392018-11-19 15:54:10 +0100328 * Backlight off before OS handover
329 */
330void board_preboot_os(void)
331{
332 gpio_request(TEGRA_GPIO(BB, 5), "BL_ON");
333 gpio_direction_output(TEGRA_GPIO(BB, 5), 0);
334}