Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2014 DENX Software Engineering |
| 4 | * Heiko Schocher <hs@denx.de> |
| 5 | * |
| 6 | * Based on: |
| 7 | * Copyright (C) 2013 Atmel Corporation |
| 8 | * Bo Shen <voice.shen@atmel.com> |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 12 | #include <hang.h> |
Simon Glass | 9758973 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 13 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 14 | #include <log.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 15 | #include <asm/global_data.h> |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 16 | #include <asm/io.h> |
| 17 | #include <asm/arch/at91_common.h> |
| 18 | #include <asm/arch/at91sam9_matrix.h> |
| 19 | #include <asm/arch/at91_pit.h> |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 20 | #include <asm/arch/at91_rstc.h> |
| 21 | #include <asm/arch/at91_wdt.h> |
| 22 | #include <asm/arch/clk.h> |
| 23 | #include <spl.h> |
| 24 | |
| 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
| 27 | static void enable_ext_reset(void) |
| 28 | { |
| 29 | struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC; |
| 30 | |
| 31 | writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr); |
| 32 | } |
| 33 | |
| 34 | void lowlevel_clock_init(void) |
| 35 | { |
| 36 | struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
| 37 | |
| 38 | if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) { |
| 39 | /* Enable Main Oscillator */ |
| 40 | writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor); |
| 41 | |
| 42 | /* Wait until Main Oscillator is stable */ |
| 43 | while (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) |
| 44 | ; |
| 45 | } |
| 46 | |
| 47 | /* After stabilization, switch to Main Oscillator */ |
| 48 | if ((readl(&pmc->mckr) & AT91_PMC_CSS) == AT91_PMC_CSS_SLOW) { |
| 49 | unsigned long tmp; |
| 50 | |
| 51 | tmp = readl(&pmc->mckr); |
| 52 | tmp &= ~AT91_PMC_CSS; |
| 53 | tmp |= AT91_PMC_CSS_MAIN; |
| 54 | writel(tmp, &pmc->mckr); |
| 55 | while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) |
| 56 | ; |
| 57 | |
| 58 | tmp &= ~AT91_PMC_PRES; |
| 59 | tmp |= AT91_PMC_PRES_1; |
| 60 | writel(tmp, &pmc->mckr); |
| 61 | while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY)) |
| 62 | ; |
| 63 | } |
| 64 | |
| 65 | return; |
| 66 | } |
| 67 | |
| 68 | void __weak matrix_init(void) |
| 69 | { |
| 70 | } |
| 71 | |
| 72 | void __weak at91_spl_board_init(void) |
| 73 | { |
| 74 | } |
| 75 | |
Bo Shen | c56e9f4 | 2015-03-27 14:23:34 +0800 | [diff] [blame] | 76 | void __weak spl_board_init(void) |
| 77 | { |
| 78 | } |
| 79 | |
| 80 | void board_init_f(ulong dummy) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 81 | { |
Stefan Roese | 7937d03 | 2019-04-02 10:57:16 +0200 | [diff] [blame] | 82 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
| 83 | int ret; |
| 84 | |
| 85 | ret = spl_early_init(); |
| 86 | if (ret) { |
| 87 | debug("spl_early_init() failed: %d\n", ret); |
| 88 | hang(); |
| 89 | } |
| 90 | #endif |
| 91 | |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 92 | lowlevel_clock_init(); |
Prasanthi Chellakumar | 0509c4e | 2018-10-09 11:46:40 -0700 | [diff] [blame] | 93 | #if !defined(CONFIG_WDT_AT91) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 94 | at91_disable_wdt(); |
Tom Rini | 4a2b61b | 2018-05-10 07:15:52 -0400 | [diff] [blame] | 95 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 96 | |
| 97 | /* |
| 98 | * At this stage the main oscillator is supposed to be enabled |
| 99 | * PCK = MCK = MOSC |
| 100 | */ |
Wenyou Yang | 747e9db | 2016-02-02 12:46:13 +0800 | [diff] [blame] | 101 | at91_pllicpr_init(0x00); |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 102 | |
| 103 | /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 104 | at91_plla_init(CFG_SYS_AT91_PLLA); |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 105 | |
| 106 | /* PCK = PLLA = 2 * MCK */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 107 | at91_mck_init(CFG_SYS_MCKR); |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 108 | |
| 109 | /* Switch MCK on PLLA output */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 110 | at91_mck_init(CFG_SYS_MCKR_CSS); |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 111 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 112 | #if defined(CFG_SYS_AT91_PLLB) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 113 | /* Configure PLLB */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 114 | at91_pllb_init(CFG_SYS_AT91_PLLB); |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 115 | #endif |
| 116 | |
| 117 | /* Enable External Reset */ |
| 118 | enable_ext_reset(); |
| 119 | |
| 120 | /* Initialize matrix */ |
| 121 | matrix_init(); |
| 122 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 123 | gd->arch.mck_rate_hz = CFG_SYS_MASTER_CLOCK; |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 124 | /* |
| 125 | * init timer long enough for using in spl. |
| 126 | */ |
| 127 | timer_init(); |
| 128 | |
| 129 | /* enable clocks for all PIOs */ |
Bo Shen | 9c70939 | 2015-03-27 14:23:36 +0800 | [diff] [blame] | 130 | #if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12) |
Bo Shen | 9a3b1fe | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 131 | at91_periph_clk_enable(ATMEL_ID_PIOAB); |
| 132 | at91_periph_clk_enable(ATMEL_ID_PIOCD); |
| 133 | #else |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 134 | at91_periph_clk_enable(ATMEL_ID_PIOA); |
| 135 | at91_periph_clk_enable(ATMEL_ID_PIOB); |
| 136 | at91_periph_clk_enable(ATMEL_ID_PIOC); |
Bo Shen | 9a3b1fe | 2015-03-27 14:23:35 +0800 | [diff] [blame] | 137 | #endif |
Heiko Schocher | 62cb156 | 2015-06-29 09:10:46 +0200 | [diff] [blame] | 138 | |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 139 | #if defined(CONFIG_SPL_SERIAL) |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 140 | /* init console */ |
| 141 | at91_seriald_hw_init(); |
| 142 | preloader_console_init(); |
Heiko Schocher | 62cb156 | 2015-06-29 09:10:46 +0200 | [diff] [blame] | 143 | #endif |
Heiko Schocher | f1e3a8c | 2014-10-31 08:31:04 +0100 | [diff] [blame] | 144 | |
| 145 | mem_init(); |
| 146 | |
| 147 | at91_spl_board_init(); |
| 148 | } |