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git01.mediatek.com / filogic / uboot / 1f5a510b6878e737ffd997eb8ea38e8a257cf417 / . / arch / arm / dts / zynqmp-sc-vek280-revA.dtso
blob: 3320bbc11fcd4915413152d8b77c6d3a57b663b1 [file] [log] [blame]
Michal Simekeaa6f3d2023-09-27 11:53:34 +0200[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
2/*
3 * dts file for Xilinx ZynqMP VEK280 revA
4 *
5 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc
6 *
7 * Michal Simek <michal.simek@amd.com>
8 */
9
10#include <dt-bindings/gpio/gpio.h>
11
12/dts-v1/;
13/plugin/;
14
15&{/} {
16 compatible = "xlnx,zynqmp-sc-vek280-revA", "xlnx,zynqmp-vek280-revA",
17 "xlnx,zynqmp-vek280", "xlnx,zynqmp";
18
19 vc7_xin: vc7-xin {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <50000000>;
23 };
24};
25
26&i2c0 {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 tca6416_u233: gpio@20 { /* u233 */
31 compatible = "ti,tca6416";
32 reg = <0x20>;
33 gpio-controller; /* interrupt not connected */
34 #gpio-cells = <2>;
35 gpio-line-names = "", "", "SFP_MOD_ABS", "SFP_TX_DISABLE", /* 0 - 3 */
36 "PMBUS2_INA226_ALERT", "", "", "", /* 4 - 7 */
37 "FMCP1_FMC_PRSNT_M2C_B", "", "FMCP1_FMCP_PRSNT_M2C_B", "", /* 10 - 13 */
38 "VCCINT_VRHOT_B", "8A34001_EXP_RST_B", "PMBUS_ALERT", "PMBUS1_INA226_ALERT"; /* 14 - 17 */
39 };
40
41 i2c-mux@74 { /* u33 */
42 compatible = "nxp,pca9548";
43 #address-cells = <1>;
44 #size-cells = <0>;
45 reg = <0x74>;
46 /* reset-gpios = <&gpio SYSCTLR_IIC_MUX0_RESET_B GPIO_ACTIVE_HIGH>; */
47 pmbus_i2c: i2c@0 {
48 #address-cells = <1>;
49 #size-cells = <0>;
50 reg = <0>;
51 /* On connector J325 */
52 ir35215_46: pmic@46 { /* IR35215 - u152 */
53 compatible = "infineon,ir35215";
54 reg = <0x46>; /* i2c addr - 0x16 */
55 };
56 irps5401_47: pmic5401@47 { /* IRPS5401 - u160 */
57 compatible = "infineon,irps5401";
58 reg = <0x47>; /* i2c addr 0x17 */
59 };
60 irps5401_48: pmic@48 { /* IRPS5401 - u279 */
61 compatible = "infineon,irps5401";
62 reg = <0x48>; /* i2c addr 0x18 */
63 };
64 ir38064_49: regulator@49 { /* IR38064 - u295 */
65 compatible = "infineon,ir38064";
66 reg = <0x49>; /* i2c addr 0x19 */
67 };
68 irps5401_4c: pmic@4c { /* IRPS5401 - u167 */
69 compatible = "infineon,irps5401";
70 reg = <0x4c>; /* i2c addr 0x1c */
71 };
72 irps5401_4d: pmic@4d { /* IRPS5401 - u175 */
73 compatible = "infineon,irps5401";
74 reg = <0x4d>; /* i2c addr 0x1d */
75 };
76 ir38060_4e: regulator@4e { /* IR38060 - u282 */
77 compatible = "infineon,ir38060";
78 reg = <0x4e>; /* i2c addr 0x1e */
79 };
80 };
81 pmbus1_ina226_i2c: i2c@1 {
82 #address-cells = <1>;
83 #size-cells = <0>;
84 reg = <1>;
85 /* alerts coming to u233 and SC */
86 vccint: ina226@40 { /* u65 */
87 compatible = "ti,ina226";
88 reg = <0x40>;
89 shunt-resistor = <500>; /* r440 */
90 };
91 vcc_soc: ina226@41 { /* u161 */
92 compatible = "ti,ina226";
93 reg = <0x41>;
94 shunt-resistor = <500>; /* r1702 */
95 };
96 vcc_pmc: ina226@42 { /* u163 */
97 compatible = "ti,ina226";
98 reg = <0x42>;
99 shunt-resistor = <5000>; /* r382 */
100 };
101 vcc_ram: ina226@43 { /* u355 */
102 compatible = "ti,ina226";
103 reg = <0x43>;
104 shunt-resistor = <5000>; /* r2417 */
105 };
106 vcc_pslp: ina226@44 { /* u165 */
107 compatible = "ti,ina226";
108 reg = <0x44>;
109 shunt-resistor = <5000>; /* r1830 */
110 };
111 vcc_psfp: ina226@45 { /* u260 */
112 compatible = "ti,ina226";
113 reg = <0x45>;
114 shunt-resistor = <5000>; /* r2386 */
115 };
116 vcco_hdio: ina226@46 { /* u356 */
117 compatible = "ti,ina226";
118 reg = <0x46>;
119 shunt-resistor = <5000>; /* r2392 */
120 };
121 };
122 i2c@2 { /* NC */ /* FIXME maybe remove */
123 #address-cells = <1>;
124 #size-cells = <0>;
125 reg = <2>;
126 };
127 pmbus2_ina226_i2c: i2c@3 {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 reg = <3>;
131 /* alerts coming to u233 and SC */
132 vccaux: ina226@40 { /* u166 */
133 compatible = "ti,ina226";
134 reg = <0x40>;
135 shunt-resistor = <5000>; /* r2384 */
136 };
137 vccaux_pmc: ina226@41 { /* u168 */
138 compatible = "ti,ina226";
139 reg = <0x41>;
140 shunt-resistor = <5000>; /* r2000 */
141 };
142 mgtavcc: ina226@42 { /* u265 */
143 compatible = "ti,ina226";
144 reg = <0x42>;
145 shunt-resistor = <5000>; /* r1829 */
146 };
147 vcc1v5: ina226@43 { /* u264 */
148 compatible = "ti,ina226";
149 reg = <0x43>;
150 shunt-resistor = <5000>; /* r2397 */
151 };
152 vcco_mio: ina226@45 { /* u172 */
153 compatible = "ti,ina226";
154 reg = <0x45>;
155 shunt-resistor = <5000>; /* r2401 */
156 };
157 mgtavtt: ina226@46 { /* u188 */
158 compatible = "ti,ina226";
159 reg = <0x46>;
160 shunt-resistor = <500>; /* r1384 */
161 };
162 vcco_502: ina226@47 { /* u174 */
163 compatible = "ti,ina226";
164 reg = <0x47>;
165 shunt-resistor = <5000>; /* r1994 */
166 };
167 mgtvccaux: ina226@48 { /* u176 */
168 compatible = "ti,ina226";
169 reg = <0x48>;
170 shunt-resistor = <5000>; /* r2384 */
171 };
172 vcc1v1_lp4: ina226@49 { /* u306 */
173 compatible = "ti,ina226";
174 reg = <0x49>;
175 shunt-resistor = <500>; /* r2064 */
176 };
177 vadj_fmc: ina226@4a { /* u281 */
178 compatible = "ti,ina226";
179 reg = <0x4a>;
180 shunt-resistor = <5000>; /* r2031 */
181 };
182 lpdmgtyavcc: ina226@4b { /* u177 */
183 compatible = "ti,ina226";
184 reg = <0x4b>;
185 shunt-resistor = <5000>; /* r2004 */
186 };
187 lpdmgtyavtt: ina226@4c { /* u309 */
188 compatible = "ti,ina226";
189 reg = <0x4c>;
190 shunt-resistor = <5000>; /* r1229 */
191 };
192 lpdmgtyvccaux: ina226@4d { /* u234 */
193 compatible = "ti,ina226";
194 reg = <0x4d>;
195 shunt-resistor = <5000>; /* r1679 */
196 };
197 };
198 i2c@4 { /* NC */ /* FIXME maybe remove */
199 #address-cells = <1>;
200 #size-cells = <0>;
201 reg = <4>;
202 };
203 rc21008a_gtclk1: i2c@5 {
204 #address-cells = <1>;
205 #size-cells = <0>;
206 reg = <5>;
207 /* connector j374 */
208 /* rc21008a at 0x9 u299 */
209 vc7: clock-generator@9 {
210 compatible = "renesas,rc21008a";
211 reg = <0x9>;
212 #clock-cells = <1>;
213 clocks = <&vc7_xin>;
214 clock-names = "xin";
215 };
216 };
217 fmcp1_iic: i2c@6 {
218 #address-cells = <1>;
219 #size-cells = <0>;
220 reg = <6>;
221 /* to j51c */
222 };
223 sfp: i2c@7 {
224 #address-cells = <1>;
225 #size-cells = <0>;
226 reg = <7>;
227 /* sfp+ connector J376 */
228 };
229 };
230};