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git01.mediatek.com / filogic / uboot / 1f5a510b6878e737ffd997eb8ea38e8a257cf417 / . / arch / arm / dts / rk3566-soquartz.dtsi
blob: 31aa2b8efe39314087190027c495cb2b4a26c163 [file] [log] [blame]
Jonas Karlman39517362023-07-30 12:26:45 +0000[diff] [blame]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/pinctrl/rockchip.h>
7#include <dt-bindings/soc/rockchip,vop2.h>
8#include "rk3566.dtsi"
9
10/ {
11 model = "Pine64 RK3566 SoQuartz SOM";
12 compatible = "pine64,soquartz", "rockchip,rk3566";
13
14 aliases {
15 ethernet0 = &gmac1;
16 mmc0 = &sdmmc0;
17 mmc1 = &sdhci;
18 mmc2 = &sdmmc1;
19 };
20
21 chosen: chosen {
22 stdout-path = "serial2:1500000n8";
23 };
24
25 gmac1_clkin: external-gmac1-clock {
26 compatible = "fixed-clock";
27 clock-frequency = <125000000>;
28 clock-output-names = "gmac1_clkin";
29 #clock-cells = <0>;
30 };
31
32 hdmi-con {
33 compatible = "hdmi-connector";
34 type = "a";
35
36 port {
37 hdmi_con_in: endpoint {
38 remote-endpoint = <&hdmi_out_con>;
39 };
40 };
41 };
42
43 leds {
44 compatible = "gpio-leds";
45
46 led_diy: led-diy {
47 label = "diy-led";
48 default-state = "on";
49 gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
50 linux,default-trigger = "heartbeat";
51 pinctrl-names = "default";
52 pinctrl-0 = <&diy_led_enable_h>;
53 retain-state-suspended;
54 status = "disabled";
55 };
56
57 led_work: led-work {
58 label = "work-led";
59 default-state = "off";
60 gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
61 pinctrl-names = "default";
62 pinctrl-0 = <&work_led_enable_h>;
63 retain-state-suspended;
64 status = "disabled";
65 };
66 };
67
68 sdio_pwrseq: sdio-pwrseq {
69 status = "okay";
70 compatible = "mmc-pwrseq-simple";
71 clocks = <&rk809 1>;
72 clock-names = "ext_clock";
73 pinctrl-names = "default";
74 pinctrl-0 = <&wifi_enable_h>;
75 reset-gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_LOW>;
76 };
77
78 vbus: vbus-regulator {
79 compatible = "regulator-fixed";
80 regulator-name = "vbus";
81 regulator-always-on;
82 regulator-boot-on;
83 regulator-min-microvolt = <5000000>;
84 regulator-max-microvolt = <5000000>;
85 };
86
87 /* sourced from vbus, vbus is provided by the carrier board */
88 vcc5v0_sys: vcc5v0-sys-regulator {
89 compatible = "regulator-fixed";
90 regulator-name = "vcc5v0_sys";
91 regulator-always-on;
92 regulator-boot-on;
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
95 vin-supply = <&vbus>;
96 };
97
98 vcc3v3_sys: vcc3v3-sys-regulator {
99 compatible = "regulator-fixed";
100 regulator-name = "vcc3v3_sys";
101 regulator-always-on;
102 regulator-boot-on;
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
105 vin-supply = <&vcc5v0_sys>;
106 };
107};
108
109&cpu0 {
110 cpu-supply = <&vdd_cpu>;
111};
112
113&cpu1 {
114 cpu-supply = <&vdd_cpu>;
115};
116
117&cpu2 {
118 cpu-supply = <&vdd_cpu>;
119};
120
121&cpu3 {
122 cpu-supply = <&vdd_cpu>;
123};
124
125&gmac1 {
126 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
127 assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
128 clock_in_out = "input";
129 phy-supply = <&vcc_3v3>;
130 phy-mode = "rgmii";
131 pinctrl-names = "default";
132 pinctrl-0 = <&gmac1m0_miim
133 &gmac1m0_tx_bus2
134 &gmac1m0_rx_bus2
135 &gmac1m0_rgmii_clk
136 &gmac1m0_clkinout
137 &gmac1m0_rgmii_bus>;
138 snps,reset-gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>;
139 snps,reset-active-low;
140 /* Reset time is 20ms, 100ms for rtl8211f, also works well here */
141 snps,reset-delays-us = <0 20000 100000>;
142 tx_delay = <0x30>;
143 rx_delay = <0x10>;
144 phy-handle = <&rgmii_phy1>;
145 status = "disabled";
146};
147
148&gpio0 {
149 nextrst-hog {
150 gpio-hog;
151 /*
152 * GPIO_ACTIVE_LOW + output-low here means that the pin is set
153 * to high, because output-low decides the value pre-inversion.
154 */
155 gpios = <RK_PA5 GPIO_ACTIVE_LOW>;
156 line-name = "nEXTRST";
157 output-low;
158 };
159};
160
161&gpu {
162 mali-supply = <&vdd_gpu>;
163 status = "okay";
164};
165
166&hdmi {
167 avdd-0v9-supply = <&vdda0v9_image>;
168 avdd-1v8-supply = <&vcca1v8_image>;
169 status = "okay";
170};
171
172&hdmi_in {
173 hdmi_in_vp0: endpoint {
174 remote-endpoint = <&vp0_out_hdmi>;
175 };
176};
177
178&hdmi_out {
179 hdmi_out_con: endpoint {
180 remote-endpoint = <&hdmi_con_in>;
181 };
182};
183
184&hdmi_sound {
185 status = "okay";
186};
187
188&i2c0 {
189 status = "okay";
190
191 vdd_cpu: regulator@1c {
192 compatible = "tcs,tcs4525";
193 reg = <0x1c>;
194 fcs,suspend-voltage-selector = <1>;
195 regulator-name = "vdd_cpu";
196 regulator-min-microvolt = <800000>;
197 regulator-max-microvolt = <1150000>;
198 regulator-ramp-delay = <2300>;
199 regulator-always-on;
200 regulator-boot-on;
201 vin-supply = <&vcc5v0_sys>;
202
203 regulator-state-mem {
204 regulator-off-in-suspend;
205 };
206 };
207
208 rk809: pmic@20 {
209 compatible = "rockchip,rk809";
210 reg = <0x20>;
211 interrupt-parent = <&gpio0>;
212 interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
213 #clock-cells = <1>;
214 clock-output-names = "rk808-clkout1", "rk808-clkout2";
215 pinctrl-names = "default";
216 pinctrl-0 = <&pmic_int_l>;
217 rockchip,system-power-controller;
218 wakeup-source;
219
220 vcc1-supply = <&vcc3v3_sys>;
221 vcc2-supply = <&vcc3v3_sys>;
222 vcc3-supply = <&vcc3v3_sys>;
223 vcc4-supply = <&vcc3v3_sys>;
224 vcc5-supply = <&vcc3v3_sys>;
225 vcc6-supply = <&vcc3v3_sys>;
226 vcc7-supply = <&vcc3v3_sys>;
227 vcc8-supply = <&vcc3v3_sys>;
228 vcc9-supply = <&vcc3v3_sys>;
229
230 regulators {
231 vdd_logic: DCDC_REG1 {
232 regulator-name = "vdd_logic";
233 regulator-always-on;
234 regulator-boot-on;
235 regulator-min-microvolt = <500000>;
236 regulator-max-microvolt = <1350000>;
237 regulator-init-microvolt = <900000>;
238 regulator-ramp-delay = <6001>;
239 regulator-initial-mode = <0x2>;
240 regulator-state-mem {
241 regulator-on-in-suspend;
242 regulator-suspend-microvolt = <900000>;
243 };
244 };
245
246 vdd_gpu: DCDC_REG2 {
247 regulator-name = "vdd_gpu";
248 regulator-always-on;
249 regulator-boot-on;
250 regulator-min-microvolt = <500000>;
251 regulator-max-microvolt = <1350000>;
252 regulator-init-microvolt = <900000>;
253 regulator-ramp-delay = <6001>;
254 regulator-initial-mode = <0x2>;
255 regulator-state-mem {
256 regulator-off-in-suspend;
257 };
258 };
259
260 vcc_ddr: DCDC_REG3 {
261 regulator-always-on;
262 regulator-boot-on;
263 regulator-initial-mode = <0x2>;
264 regulator-name = "vcc_ddr";
265 regulator-state-mem {
266 regulator-on-in-suspend;
267 };
268 };
269
270 vdd_npu: DCDC_REG4 {
271 regulator-always-on;
272 regulator-boot-on;
273 regulator-min-microvolt = <500000>;
274 regulator-max-microvolt = <1350000>;
275 regulator-init-microvolt = <900000>;
276 regulator-initial-mode = <0x2>;
277 regulator-name = "vdd_npu";
278 regulator-state-mem {
279 regulator-off-in-suspend;
280 };
281 };
282
283 vcc_1v8: DCDC_REG5 {
284 regulator-name = "vcc_1v8";
285 regulator-always-on;
286 regulator-boot-on;
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 regulator-state-mem {
290 regulator-on-in-suspend;
291 regulator-suspend-microvolt = <1800000>;
292 };
293 };
294
295 vdda0v9_image: LDO_REG1 {
296 regulator-always-on;
297 regulator-boot-on;
298 regulator-min-microvolt = <900000>;
299 regulator-max-microvolt = <900000>;
300 regulator-name = "vdda0v9_image";
301 regulator-state-mem {
302 regulator-on-in-suspend;
303 regulator-suspend-microvolt = <900000>;
304 };
305 };
306
307 vdda_0v9: LDO_REG2 {
308 regulator-always-on;
309 regulator-boot-on;
310 regulator-min-microvolt = <900000>;
311 regulator-max-microvolt = <900000>;
312 regulator-name = "vdda_0v9";
313 regulator-state-mem {
314 regulator-off-in-suspend;
315 };
316 };
317
318 vdda0v9_pmu: LDO_REG3 {
319 regulator-always-on;
320 regulator-boot-on;
321 regulator-min-microvolt = <900000>;
322 regulator-max-microvolt = <900000>;
323 regulator-name = "vdda0v9_pmu";
324 regulator-state-mem {
325 regulator-on-in-suspend;
326 regulator-suspend-microvolt = <900000>;
327 };
328 };
329
330 vccio_acodec: LDO_REG4 {
331 regulator-always-on;
332 regulator-boot-on;
333 regulator-min-microvolt = <3300000>;
334 regulator-max-microvolt = <3300000>;
335 regulator-name = "vccio_acodec";
336 regulator-state-mem {
337 regulator-off-in-suspend;
338 };
339 };
340
341 vccio_sd: LDO_REG5 {
342 regulator-always-on;
343 regulator-boot-on;
344 regulator-min-microvolt = <1800000>;
345 regulator-max-microvolt = <3300000>;
346 regulator-name = "vccio_sd";
347 regulator-state-mem {
348 regulator-off-in-suspend;
349 };
350 };
351
352 vcc3v3_pmu: LDO_REG6 {
353 regulator-always-on;
354 regulator-boot-on;
355 regulator-min-microvolt = <3300000>;
356 regulator-max-microvolt = <3300000>;
357 regulator-name = "vcc3v3_pmu";
358 regulator-state-mem {
359 regulator-on-in-suspend;
360 regulator-suspend-microvolt = <3300000>;
361 };
362 };
363
364 vcca_1v8: LDO_REG7 {
365 regulator-always-on;
366 regulator-boot-on;
367 regulator-min-microvolt = <1800000>;
368 regulator-max-microvolt = <1800000>;
369 regulator-name = "vcca_1v8";
370 regulator-state-mem {
371 regulator-off-in-suspend;
372 };
373 };
374
375 vcca1v8_pmu: LDO_REG8 {
376 regulator-always-on;
377 regulator-boot-on;
378 regulator-min-microvolt = <1800000>;
379 regulator-max-microvolt = <1800000>;
380 regulator-name = "vcca1v8_pmu";
381 regulator-state-mem {
382 regulator-off-in-suspend;
383 };
384 };
385
386 vcca1v8_image: LDO_REG9 {
387 regulator-always-on;
388 regulator-boot-on;
389 regulator-min-microvolt = <1800000>;
390 regulator-max-microvolt = <1800000>;
391 regulator-name = "vcca1v8_image";
392 regulator-state-mem {
393 regulator-off-in-suspend;
394 };
395 };
396
397 vcc_3v3: SWITCH_REG1 {
398 regulator-name = "vcc_3v3";
399 regulator-state-mem {
400 regulator-off-in-suspend;
401 };
402 };
403
404 vcc3v3_sd: SWITCH_REG2 {
405 regulator-name = "vcc3v3_sd";
406 status = "disabled";
407 regulator-state-mem {
408 regulator-on-in-suspend;
409 };
410 };
411
412 };
413 };
414};
415
416/*
417 * i2c1 is exposed on CM1 / Module1A
418 * pin 80 - i2c1_scl_m0, pullup to vcc3v3_pmu
419 * pin 82 - i2c1_sda_m0, pullup to vcc3v3_pmu
420 */
421&i2c1 {
422 status = "disabled";
423};
424
425/*
426 * i2c2 is exposed on CM1 / Module1A
427 * pin 56 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch
428 * pin 58 - i2c2_sda_m1, pullup to vcc_3v3
429 */
430&i2c2 {
431 pinctrl-names = "default";
432 pinctrl-0 = <&i2c2m1_xfer>;
433 status = "disabled";
434};
435
436/*
437 * i2c3 is exposed on CM1 / Module1A
438 * pin 35 - i2c3_scl_m0, pullup to vcc_3v3
439 * pin 36 - i2c3_sda_m0, pullup to vcc_3v3
440 */
441&i2c3 {
442 status = "disabled";
443};
444
445/*
446 * i2c4 is exposed on CM2 / Module1B
447 * pin 45 - i2c4_scl_m1
448 * pin 47 - i2c4_sda_m1
449 */
450&i2c4 {
451 pinctrl-names = "default";
452 pinctrl-0 = <&i2c4m1_xfer>;
453 status = "disabled";
454};
455
456&i2s0_8ch {
457 status = "okay";
458};
459
460/*
461 * i2s1_8ch is exposed on CM1 / Module1A
462 * pin 24 - i2s1_sdi1_m1
463 * pin 25 - i2s1_sdo0_m1
464 * pin 26 - i2s1_lrck_tx_m1
465 * pin 27 - i2s1_sdi0_m1
466 * pin 29 - i2s1_sdi3_m1
467 * pin 30 - i2s1_sdi2_m1
468 * pin 40 - i2s1_sdo1_m1, shared with spi3
469 * pin 41 - i2s1_sdo2_m1
470 * pin 49 - i2s1_sclk_tx_m1
471 * pin 50 - i2s1_mclk_m1
472 * pin 56 - i2s1_sdo3_m1, shared with i2c2
473 */
474&i2s1_8ch {
475 pinctrl-names = "default";
476 pinctrl-0 = <&i2s1m1_sclktx &i2s1m1_sclkrx
477 &i2s1m1_lrcktx &i2s1m1_lrckrx
478 &i2s1m1_sdi0 &i2s1m1_sdi1
479 &i2s1m1_sdi2 &i2s1m1_sdi3
480 &i2s1m1_sdo0 &i2s1m1_sdo1
481 &i2s1m1_sdo2 &i2s1m1_sdo3>;
482 status = "disabled";
483};
484
485&mdio1 {
486 rgmii_phy1: ethernet-phy@0 {
487 compatible = "ethernet-phy-ieee802.3-c22";
488 reg = <0>;
489 status = "disabled";
490 };
491};
492
493&pcie2x1 {
494 pinctrl-names = "default";
495 pinctrl-0 = <&pcie_reset_h>;
496 reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
497};
498
499&pinctrl {
500 bt {
501 bt_enable_h: bt-enable-h {
502 rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
503 };
504
505 bt_host_wake_l: bt-host-wake-l {
506 rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
507 };
508
509 bt_wake_l: bt-wake-l {
510 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
511 };
512 };
513
514 leds {
515 work_led_enable_h: work-led-enable-h {
516 rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
517 };
518
519 diy_led_enable_h: diy-led-enable-h {
520 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
521 };
522 };
523
524 pcie {
525 pcie_clkreq_h: pcie-clkreq-h {
526 rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
527 };
528 pcie_reset_h: pcie-reset-h {
529 rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
530 };
531 };
532
533 pmic {
534 pmic_int_l: pmic-int-l {
535 rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
536 };
537 };
538
539 sdio-pwrseq {
540 wifi_enable_h: wifi-enable-h {
541 rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
542 };
543 };
544};
545
546&pmu_io_domains {
547 pmuio1-supply = <&vcc3v3_pmu>;
548 pmuio2-supply = <&vcc3v3_pmu>;
549 vccio1-supply = <&vcc_3v3>;
550 vccio2-supply = <&vcc_1v8>;
551 vccio3-supply = <&vccio_sd>;
552 vccio4-supply = <&vcc_1v8>;
553 vccio5-supply = <&vcc_3v3>;
554 vccio6-supply = <&vcc_3v3>;
555 vccio7-supply = <&vcc_3v3>;
556 status = "okay";
557};
558
559/*
560 * saradc is exposed on CM1 / Module1A
561 * pin 94 - saradc_vin3
562 * pin 96 - saradc_vin2
563 */
564&saradc {
565 vref-supply = <&vcca_1v8>;
566 status = "disabled";
567};
568
569&sdhci {
570 bus-width = <8>;
571 mmc-hs200-1_8v;
572 non-removable;
573 vmmc-supply = <&vcc_3v3>;
574 vqmmc-supply = <&vcc_1v8>;
575 status = "okay";
576};
577
578&sdmmc0 {
579 broken-cd;
580 bus-width = <4>;
581 cap-sd-highspeed;
582 disable-wp;
583 pinctrl-names = "default";
584 pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
585 vqmmc-supply = <&vccio_sd>;
586 status = "disabled";
587};
588
589&sdmmc1 {
590 bus-width = <4>;
591 cap-sd-highspeed;
592 cap-sdio-irq;
593 keep-power-in-suspend;
594 mmc-pwrseq = <&sdio_pwrseq>;
595 non-removable;
596 pinctrl-names = "default";
597 pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
598 sd-uhs-sdr50;
599 vmmc-supply = <&vcc3v3_sys>;
600 vqmmc-supply = <&vcc_1v8>;
601 status = "okay";
602};
603
604/*
605 * spi3 is exposed on CM1 / Module1A
606 * pin 37 - spi3_cs1_m0
607 * pin 38 - spi3_clk_m0
608 * pin 39 - spi3_cs0_m0
609 * pin 40 - spi3_miso_m0, shared with i2s1_8ch
610 * pin 44 - spi3_mosi_m0
611 */
612&spi3 {
613 status = "disabled";
614};
615
616&tsadc {
617 status = "okay";
618};
619
620&uart1 {
621 pinctrl-names = "default";
622 pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
623 uart-has-rtscts;
624 status = "okay";
625
626 bluetooth {
627 compatible = "brcm,bcm43438-bt";
628 clocks = <&rk809 1>;
629 clock-names = "lpo";
630 device-wakeup-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
631 host-wakeup-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
632 shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
633 pinctrl-names = "default";
634 pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>;
635 vbat-supply = <&vcc3v3_sys>;
636 vddio-supply = <&vcca1v8_pmu>;
637 };
638};
639
640/*
641 * uart2 is exposed on CM1 / Module1A
642 * pin 51 - uart2_rx_m0
643 * pin 55 - uart2_tx_m0
644 */
645&uart2 {
646 status = "disabled";
647};
648
649/*
650 * uart7 is exposed on CM1 / Module1A
651 * pin 46 - uart7_tx_m2
652 * pin 47 - uart7_rx_m2
653 */
654&uart7 {
655 pinctrl-names = "default";
656 pinctrl-0 = <&uart7m2_xfer>;
657 status = "disabled";
658};
659
660/* dwc3_otg is the only usb port available */
661&usb2phy0 {
662 status = "disabled";
663};
664
665&usb2phy0_otg {
666 status = "disabled";
667};
668
669&usb_host0_xhci {
670 status = "disabled";
671};
672
673&vop {
674 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
675 assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
676 status = "okay";
677};
678
679&vop_mmu {
680 status = "okay";
681};
682
683&vp0 {
684 vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
685 reg = <ROCKCHIP_VOP2_EP_HDMI0>;
686 remote-endpoint = <&hdmi_in_vp0>;
687 };
688};