blob: d6c6baa5518bd15ff1091e60f8e88c6f6a86cab8 [file] [log] [blame]
Robert Nelson0c24aad2023-08-25 13:03:03 -05001// SPDX-License-Identifier: GPL-2.0
2/*
3 * https://beagleboard.org/play
4 *
5 * Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/
6 * Copyright (C) 2022-2023 Robert Nelson, BeagleBoard.org Foundation
7 */
8
9#include "k3-am625-sk-binman.dtsi"
10
11/ {
12 chosen {
13 tick-timer = &main_timer0;
14 };
15
16 memory@80000000 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050017 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050018 };
19
20 /* Keep the LEDs on by default to indicate life */
21 leds {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050022 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050023 led-0 {
24 default-state = "on";
Nishanth Menonc45d4d02023-10-02 10:00:53 -050025 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050026 };
27
28 led-1 {
29 default-state = "on";
Nishanth Menonc45d4d02023-10-02 10:00:53 -050030 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050031 };
32
33 led-2 {
34 default-state = "on";
Nishanth Menonc45d4d02023-10-02 10:00:53 -050035 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050036 };
37
38 led-3 {
39 default-state = "on";
Nishanth Menonc45d4d02023-10-02 10:00:53 -050040 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050041 };
42
43 led-4 {
44 default-state = "on";
Nishanth Menonc45d4d02023-10-02 10:00:53 -050045 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050046 };
47 };
48};
49
50&cbass_main {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050051 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050052};
53
54&main_timer0 {
55 clock-frequency = <25000000>;
Nishanth Menonc45d4d02023-10-02 10:00:53 -050056 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050057};
58
59&dmss {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050060 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050061};
62
63&secure_proxy_main {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050064 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050065};
66
67&dmsc {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050068 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050069};
70
71&k3_pds {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050072 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050073};
74
75&k3_clks {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050076 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050077};
78
79&k3_reset {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050080 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050081};
82
83&dmsc {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050084 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050085 k3_sysreset: sysreset-controller {
86 compatible = "ti,sci-sysreset";
Nishanth Menonc45d4d02023-10-02 10:00:53 -050087 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050088 };
89};
90
91&wkup_conf {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050092 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050093};
94
95&chipid {
Nishanth Menonc45d4d02023-10-02 10:00:53 -050096 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050097};
98
99&main_pmx0 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500100 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500101};
102
103&main_uart0 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500104 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500105};
106
107&console_pins_default {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500108 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500109};
110
111&cbass_mcu {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500112 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500113};
114
115&cbass_wakeup {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500116 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500117};
118
119&mcu_pmx0 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500120 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500121};
122
123&main_i2c0 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500124 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500125};
126
127&local_i2c_pins_default {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500128 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500129};
130
131&gpio0_pins_default {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500132 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500133};
134
135&main_gpio0 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500136 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500137};
138
139&main_gpio1 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500140 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500141};
142
143&sdhci0 {
144 /* EMMC */
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500145 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500146};
147
148&emmc_pins_default {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500149 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500150};
151
152&sd_pins_default {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500153 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500154 /* Force to use SDCD card detect pin */
155 pinctrl-single,pins = <
156 AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
157 AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
158 AM62X_IOPAD(0x0230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
159 AM62X_IOPAD(0x022c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
160 AM62X_IOPAD(0x0228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
161 AM62X_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
162 AM62X_IOPAD(0x0240, PIN_INPUT, 0) /* (D17) MMC1_SDCD.MMC1_SDCD */
163 >;
164};
165
166&tps65219 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500167 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500168};
169
170&sdhci1 {
Nishanth Menonc45d4d02023-10-02 10:00:53 -0500171 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500172};
173
174#ifdef CONFIG_TARGET_AM625_A53_EVM
175
176#define SPL_AM625_BEAGLEPLAY_DTB "spl/dts/k3-am625-beagleplay.dtb"
177#define AM625_BEAGLEPLAY_DTB "arch/arm/dts/k3-am625-beagleplay.dtb"
178
179&spl_am625_sk_dtb {
180 filename = SPL_AM625_BEAGLEPLAY_DTB;
181};
182
183&am625_sk_dtb {
184 filename = AM625_BEAGLEPLAY_DTB;
185};
186
187&spl_am625_sk_dtb_unsigned {
188 filename = SPL_AM625_BEAGLEPLAY_DTB;
189};
190
191&am625_sk_dtb_unsigned {
192 filename = AM625_BEAGLEPLAY_DTB;
193};
194
195#endif