Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | /* | ||||
3 | * Copyright (C) 2020 Jagan Teki <jagan@amarulasolutions.com> | ||||
4 | */ | ||||
5 | |||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 6 | / { |
7 | binman: binman { | ||||
8 | multiple-images; | ||||
9 | }; | ||||
Tim Harvey | b34f5a1 | 2023-08-24 12:01:42 -0700 | [diff] [blame] | 10 | |
11 | #ifdef CONFIG_OPTEE | ||||
12 | firmware { | ||||
13 | optee { | ||||
14 | compatible = "linaro,optee-tz"; | ||||
15 | method = "smc"; | ||||
16 | }; | ||||
17 | }; | ||||
18 | #endif | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 19 | }; |
20 | |||||
Marcel Ziswiler | 6dd051a | 2022-11-07 22:22:41 +0100 | [diff] [blame] | 21 | &soc { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 22 | bootph-all; |
23 | bootph-pre-ram; | ||||
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 24 | }; |
25 | |||||
26 | &aips1 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 27 | bootph-all; |
28 | bootph-pre-ram; | ||||
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 29 | }; |
30 | |||||
31 | &aips2 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 32 | bootph-pre-ram; |
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 33 | }; |
34 | |||||
35 | &aips3 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 36 | bootph-pre-ram; |
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 37 | }; |
38 | |||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 39 | &binman { |
40 | u-boot-spl-ddr { | ||||
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 41 | align = <4>; |
42 | align-size = <4>; | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 43 | filename = "u-boot-spl-ddr.bin"; |
44 | pad-byte = <0xff>; | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 45 | |
46 | u-boot-spl { | ||||
47 | align-end = <4>; | ||||
Marcel Ziswiler | 74d5d4f | 2021-10-23 01:15:15 +0200 | [diff] [blame] | 48 | filename = "u-boot-spl.bin"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 49 | }; |
50 | |||||
Peng Fan | 5db610f4 | 2022-07-26 16:41:20 +0800 | [diff] [blame] | 51 | ddr-1d-imem-fw { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 52 | filename = "lpddr4_pmu_train_1d_imem.bin"; |
Peng Fan | 6881157 | 2022-07-26 16:41:22 +0800 | [diff] [blame] | 53 | align-end = <4>; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 54 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 55 | }; |
56 | |||||
Peng Fan | 5db610f4 | 2022-07-26 16:41:20 +0800 | [diff] [blame] | 57 | ddr-1d-dmem-fw { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 58 | filename = "lpddr4_pmu_train_1d_dmem.bin"; |
Peng Fan | 6881157 | 2022-07-26 16:41:22 +0800 | [diff] [blame] | 59 | align-end = <4>; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 60 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 61 | }; |
62 | |||||
Peng Fan | 5db610f4 | 2022-07-26 16:41:20 +0800 | [diff] [blame] | 63 | ddr-2d-imem-fw { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 64 | filename = "lpddr4_pmu_train_2d_imem.bin"; |
Peng Fan | 6881157 | 2022-07-26 16:41:22 +0800 | [diff] [blame] | 65 | align-end = <4>; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 66 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 67 | }; |
68 | |||||
Peng Fan | 5db610f4 | 2022-07-26 16:41:20 +0800 | [diff] [blame] | 69 | ddr-2d-dmem-fw { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 70 | filename = "lpddr4_pmu_train_2d_dmem.bin"; |
Peng Fan | 6881157 | 2022-07-26 16:41:22 +0800 | [diff] [blame] | 71 | align-end = <4>; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 72 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 73 | }; |
74 | }; | ||||
75 | |||||
76 | spl { | ||||
77 | filename = "spl.bin"; | ||||
78 | |||||
79 | mkimage { | ||||
80 | args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x7e1000"; | ||||
81 | |||||
82 | blob { | ||||
83 | filename = "u-boot-spl-ddr.bin"; | ||||
84 | }; | ||||
85 | }; | ||||
86 | }; | ||||
87 | |||||
88 | itb { | ||||
89 | filename = "u-boot.itb"; | ||||
90 | |||||
91 | fit { | ||||
92 | description = "Configuration to load ATF before U-Boot"; | ||||
Marek Vasut | a7416eb | 2023-05-28 23:00:30 +0200 | [diff] [blame] | 93 | #ifndef CONFIG_IMX_HAB |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 94 | fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>; |
Marek Vasut | a7416eb | 2023-05-28 23:00:30 +0200 | [diff] [blame] | 95 | #endif |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 96 | fit,fdt-list = "of-list"; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 97 | #address-cells = <1>; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 98 | |
99 | images { | ||||
100 | uboot { | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 101 | arch = "arm64"; |
102 | compression = "none"; | ||||
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 103 | description = "U-Boot (64-bit)"; |
Simon Glass | 72cc538 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 104 | load = <CONFIG_TEXT_BASE>; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 105 | type = "standalone"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 106 | |
Patrick Wildt | a6ca691 | 2022-01-13 15:22:17 +0100 | [diff] [blame] | 107 | uboot-blob { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 108 | filename = "u-boot-nodtb.bin"; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 109 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 110 | }; |
111 | }; | ||||
112 | |||||
Marek Vasut | 1de0eb1 | 2022-12-22 01:46:37 +0100 | [diff] [blame] | 113 | #ifndef CONFIG_ARMV8_PSCI |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 114 | atf { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 115 | arch = "arm64"; |
116 | compression = "none"; | ||||
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 117 | description = "ARM Trusted Firmware"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 118 | entry = <0x920000>; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 119 | load = <0x920000>; |
120 | type = "firmware"; | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 121 | |
Patrick Wildt | a6ca691 | 2022-01-13 15:22:17 +0100 | [diff] [blame] | 122 | atf-blob { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 123 | filename = "bl31.bin"; |
Marcel Ziswiler | d87d2f1 | 2022-04-08 10:06:56 +0200 | [diff] [blame] | 124 | type = "atf-bl31"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 125 | }; |
126 | }; | ||||
Marek Vasut | 1de0eb1 | 2022-12-22 01:46:37 +0100 | [diff] [blame] | 127 | #endif |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 128 | |
129 | binman_fip: fip { | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 130 | arch = "arm64"; |
131 | compression = "none"; | ||||
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 132 | description = "Trusted Firmware FIP"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 133 | load = <0x40310000>; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 134 | type = "firmware"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 135 | }; |
136 | |||||
137 | @fdt-SEQ { | ||||
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 138 | compression = "none"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 139 | description = "NAME"; |
140 | type = "flat_dt"; | ||||
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 141 | |
Patrick Wildt | a6ca691 | 2022-01-13 15:22:17 +0100 | [diff] [blame] | 142 | uboot-fdt-blob { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 143 | filename = "u-boot.dtb"; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 144 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 145 | }; |
146 | }; | ||||
147 | }; | ||||
148 | |||||
149 | configurations { | ||||
150 | default = "@config-DEFAULT-SEQ"; | ||||
151 | |||||
Simon Glass | ceea784 | 2023-08-23 19:18:01 -0600 | [diff] [blame] | 152 | @config-SEQ { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 153 | description = "NAME"; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 154 | fdt = "fdt-SEQ"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 155 | firmware = "uboot"; |
Marek Vasut | 1de0eb1 | 2022-12-22 01:46:37 +0100 | [diff] [blame] | 156 | #ifndef CONFIG_ARMV8_PSCI |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 157 | loadables = "atf"; |
Marek Vasut | 1de0eb1 | 2022-12-22 01:46:37 +0100 | [diff] [blame] | 158 | #endif |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 159 | }; |
160 | }; | ||||
161 | }; | ||||
162 | }; | ||||
163 | |||||
164 | imx-boot { | ||||
165 | filename = "flash.bin"; | ||||
166 | pad-byte = <0x00>; | ||||
167 | |||||
Mamta Shukla | cd76f3a | 2022-07-12 14:36:18 +0000 | [diff] [blame] | 168 | #ifdef CONFIG_FSPI_CONF_HEADER |
169 | fspi_conf_block { | ||||
170 | filename = CONFIG_FSPI_CONF_FILE; | ||||
171 | type = "blob-ext"; | ||||
172 | size = <0x1000>; | ||||
173 | }; | ||||
174 | |||||
175 | spl { | ||||
176 | filename = "spl.bin"; | ||||
177 | offset = <0x1000>; | ||||
178 | type = "blob-ext"; | ||||
179 | }; | ||||
180 | |||||
181 | binman_uboot: uboot { | ||||
182 | filename = "u-boot.itb"; | ||||
183 | offset = <0x58C00>; | ||||
184 | type = "blob-ext"; | ||||
185 | }; | ||||
186 | #else | ||||
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 187 | spl { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 188 | filename = "spl.bin"; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 189 | offset = <0x0>; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 190 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 191 | }; |
192 | |||||
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 193 | binman_uboot: uboot { |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 194 | filename = "u-boot.itb"; |
Marcel Ziswiler | 0e2d37e | 2021-10-23 01:15:14 +0200 | [diff] [blame] | 195 | offset = <0x57c00>; |
Marcel Ziswiler | 3c2534a | 2021-10-23 01:15:16 +0200 | [diff] [blame] | 196 | type = "blob-ext"; |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 197 | }; |
Mamta Shukla | cd76f3a | 2022-07-12 14:36:18 +0000 | [diff] [blame] | 198 | #endif |
Marcel Ziswiler | d56d117 | 2021-10-23 01:15:13 +0200 | [diff] [blame] | 199 | }; |
200 | }; | ||||
201 | |||||
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 202 | &clk { |
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 203 | bootph-all; |
204 | bootph-pre-ram; | ||||
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 205 | /delete-property/ assigned-clocks; |
206 | /delete-property/ assigned-clock-parents; | ||||
207 | /delete-property/ assigned-clock-rates; | ||||
208 | }; | ||||
209 | |||||
210 | &iomuxc { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 211 | bootph-pre-ram; |
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 212 | }; |
213 | |||||
214 | &osc_24m { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 215 | bootph-all; |
216 | bootph-pre-ram; | ||||
Jagan Teki | 73d5118 | 2021-04-26 18:23:46 +0530 | [diff] [blame] | 217 | }; |
Marcel Ziswiler | ca453f2 | 2022-07-21 15:27:40 +0200 | [diff] [blame] | 218 | |
219 | &spba1 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 220 | bootph-all; |
221 | bootph-pre-ram; | ||||
Marcel Ziswiler | ca453f2 | 2022-07-21 15:27:40 +0200 | [diff] [blame] | 222 | }; |
223 | |||||
224 | &spba2 { | ||||
Simon Glass | d3a98cb | 2023-02-13 08:56:33 -0700 | [diff] [blame] | 225 | bootph-all; |
226 | bootph-pre-ram; | ||||
Marcel Ziswiler | ca453f2 | 2022-07-21 15:27:40 +0200 | [diff] [blame] | 227 | }; |