blob: b4002eb75046de2a677365a56e0a0a8904e8d8f0 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +01002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +01005 * Lead Tech Design <www.leadtechdesign.com>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +01006 */
7
8#include <common.h>
Xu, Hong16c092b2011-08-01 03:56:32 +00009#include <asm/io.h>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010010#include <asm/arch/at91_common.h>
Wenyou Yang57b7f292016-02-03 10:16:49 +080011#include <asm/arch/clk.h>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010012#include <asm/arch/gpio.h>
Xu, Hong16c092b2011-08-01 03:56:32 +000013
14/*
15 * if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
16 * peripheral pins. Good to have if hardware is soldered optionally
17 * or in case of SPI no slave is selected. Avoid lines to float
18 * needlessly. Use a short local PUP define.
19 *
20 * Due to errata "TXD floats when CTS is inactive" pullups are always
21 * on for TXD pins.
22 */
23#ifdef CONFIG_AT91_GPIO_PULLUP
24# define PUP CONFIG_AT91_GPIO_PULLUP
25#else
26# define PUP 0
27#endif
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010028
29void at91_serial0_hw_init(void)
30{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010031 at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* TXD0 */
Xu, Hong16c092b2011-08-01 03:56:32 +000032 at91_set_a_periph(AT91_PIO_PORTA, 7, PUP); /* RXD0 */
Wenyou Yang57b7f292016-02-03 10:16:49 +080033 at91_periph_clk_enable(ATMEL_ID_USART0);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010034}
35
36void at91_serial1_hw_init(void)
37{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010038 at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* TXD1 */
Xu, Hong16c092b2011-08-01 03:56:32 +000039 at91_set_a_periph(AT91_PIO_PORTA, 12, PUP); /* RXD1 */
Wenyou Yang57b7f292016-02-03 10:16:49 +080040 at91_periph_clk_enable(ATMEL_ID_USART1);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010041}
42
43void at91_serial2_hw_init(void)
44{
Jens Scharsigb49d15c2010-02-03 22:46:46 +010045 at91_set_a_periph(AT91_PIO_PORTA, 13, 1); /* TXD2 */
Xu, Hong16c092b2011-08-01 03:56:32 +000046 at91_set_a_periph(AT91_PIO_PORTA, 14, PUP); /* RXD2 */
Wenyou Yang57b7f292016-02-03 10:16:49 +080047 at91_periph_clk_enable(ATMEL_ID_USART2);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010048}
49
Xu, Hong16c092b2011-08-01 03:56:32 +000050void at91_seriald_hw_init(void)
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010051{
Xu, Hong16c092b2011-08-01 03:56:32 +000052 at91_set_a_periph(AT91_PIO_PORTA, 21, PUP); /* DRXD */
Jens Scharsigb49d15c2010-02-03 22:46:46 +010053 at91_set_a_periph(AT91_PIO_PORTA, 22, 1); /* DTXD */
Wenyou Yang57b7f292016-02-03 10:16:49 +080054 at91_periph_clk_enable(ATMEL_ID_SYS);
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010055}
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020056
Tuomas Tynkkynen1b725202017-10-10 21:59:42 +030057#ifdef CONFIG_ATMEL_SPI
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020058void at91_spi0_hw_init(unsigned long cs_mask)
59{
Xu, Hong16c092b2011-08-01 03:56:32 +000060 at91_set_a_periph(AT91_PIO_PORTA, 25, PUP); /* SPI0_MISO */
61 at91_set_a_periph(AT91_PIO_PORTA, 26, PUP); /* SPI0_MOSI */
62 at91_set_a_periph(AT91_PIO_PORTA, 27, PUP); /* SPI0_SPCK */
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020063
Wenyou Yang57b7f292016-02-03 10:16:49 +080064 at91_periph_clk_enable(ATMEL_ID_SPI);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020065
66 if (cs_mask & (1 << 0)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010067 at91_set_a_periph(AT91_PIO_PORTA, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020068 }
69 if (cs_mask & (1 << 1)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010070 at91_set_b_periph(AT91_PIO_PORTB, 7, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020071 }
72 if (cs_mask & (1 << 2)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010073 at91_set_a_periph(AT91_PIO_PORTD, 8, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020074 }
75 if (cs_mask & (1 << 3)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010076 at91_set_b_periph(AT91_PIO_PORTD, 9, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020077 }
78 if (cs_mask & (1 << 4)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010079 at91_set_pio_output(AT91_PIO_PORTA, 28, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020080 }
81 if (cs_mask & (1 << 5)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010082 at91_set_pio_output(AT91_PIO_PORTB, 7, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020083 }
84 if (cs_mask & (1 << 6)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010085 at91_set_pio_output(AT91_PIO_PORTD, 8, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020086 }
87 if (cs_mask & (1 << 7)) {
Jens Scharsigb49d15c2010-02-03 22:46:46 +010088 at91_set_pio_output(AT91_PIO_PORTD, 9, 1);
Jean-Christophe PLAGNIOL-VILLARD2495b2d2009-05-13 21:01:13 +020089 }
90}
91#endif
Wu, Joshb12259b2015-02-02 17:51:00 +080092
93#ifdef CONFIG_GENERIC_ATMEL_MCI
94void at91_mci_hw_init(void)
95{
Wu, Joshb12259b2015-02-02 17:51:00 +080096 at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* MCI CLK */
97 at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* MCI CDA */
98 at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* MCI DA0 */
99 at91_set_a_periph(AT91_PIO_PORTA, 3, 0); /* MCI DA1 */
100 at91_set_a_periph(AT91_PIO_PORTA, 4, 0); /* MCI DA2 */
101 at91_set_a_periph(AT91_PIO_PORTA, 5, 0); /* MCI DA3 */
102
Wenyou Yang57b7f292016-02-03 10:16:49 +0800103 at91_periph_clk_enable(ATMEL_ID_MCI);
Wu, Joshb12259b2015-02-02 17:51:00 +0800104}
105#endif