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Stefan Roesee373c5f2009-01-21 17:24:49 +01001/*
2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Stefan Roesee373c5f2009-01-21 17:24:49 +01005 */
6
7/*
8 * This file contains the configuration parameters for the VCT board
9 * family:
10 *
11 * vct_premium
12 * vct_premium_small
13 * vct_premium_onenand
14 * vct_premium_onenand_small
15 * vct_platinum
16 * vct_platinum_small
17 * vct_platinum_onenand
18 * vct_platinum_onenand_small
19 * vct_platinumavc
20 * vct_platinumavc_small
21 * vct_platinumavc_onenand
22 * vct_platinumavc_onenand_small
23 */
24
25#ifndef __CONFIG_H
26#define __CONFIG_H
27
Stefan Roesee373c5f2009-01-21 17:24:49 +010028#define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
29#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
Stefan Roesee373c5f2009-01-21 17:24:49 +010030
31#define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
32
Wolfgang Denk0708bc62010-10-07 21:51:12 +020033#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Stefan Roesee373c5f2009-01-21 17:24:49 +010034#define CONFIG_SYS_MONITOR_LEN (256 << 10)
Stefan Roesee373c5f2009-01-21 17:24:49 +010035#define CONFIG_SYS_MALLOC_LEN (1 << 20)
36#define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
37#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
38
39#if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
40#define CONFIG_VCT_NOR
Stefan Roesee373c5f2009-01-21 17:24:49 +010041#endif
42
43/*
44 * UART
45 */
Detlev Zundelf04e2582009-04-23 13:14:20 +020046#ifdef CONFIG_VCT_PLATINUMAVC
47#define UART_1_BASE 0xBDC30000
48#else
49#define UART_1_BASE 0xBF89C000
50#endif
51
52#define CONFIG_SYS_NS16550_SERIAL
Detlev Zundelf04e2582009-04-23 13:14:20 +020053#define CONFIG_SYS_NS16550_REG_SIZE -4
54#define CONFIG_SYS_NS16550_COM1 UART_1_BASE
55#define CONFIG_CONS_INDEX 1
56#define CONFIG_SYS_NS16550_CLK 921600
Stefan Roesee373c5f2009-01-21 17:24:49 +010057
58/*
59 * SDRAM
60 */
61#define CONFIG_SYS_SDRAM_BASE 0x80000000
62#define CONFIG_SYS_MBYTES_SDRAM 128
63#define CONFIG_SYS_MEMTEST_START 0x80200000
64#define CONFIG_SYS_MEMTEST_END 0x80400000
65#define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
66
67#if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
68/*
69 * SMSC91C11x Network Card
70 */
Ben Warrenfbfdd3a2009-07-20 22:01:11 -070071#define CONFIG_SMC911X
72#define CONFIG_SMC911X_BASE 0x00000000
73#define CONFIG_SMC911X_32_BIT
Stefan Roesee373c5f2009-01-21 17:24:49 +010074#define CONFIG_NET_RETRY_COUNT 20
75#endif
76
77/*
78 * Commands
79 */
Stefan Roesee373c5f2009-01-21 17:24:49 +010080
81/*
82 * Only Premium/Platinum have ethernet support right now
83 */
Daniel Schwierzeck4068f3a2011-02-03 14:17:08 +010084#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
85 !defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roesee373c5f2009-01-21 17:24:49 +010086#endif
87
88/*
89 * Only Premium/Platinum have USB-EHCI support right now
90 */
Daniel Schwierzeck4068f3a2011-02-03 14:17:08 +010091#if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
92 !defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roesee373c5f2009-01-21 17:24:49 +010093#endif
94
95#if defined(CONFIG_CMD_USB)
Stefan Roesee373c5f2009-01-21 17:24:49 +010096#define CONFIG_SUPPORT_VFAT
97
98/*
99 * USB/EHCI
100 */
Stefan Roesee373c5f2009-01-21 17:24:49 +0100101#define CONFIG_USB_EHCI_VCT /* on VCT platform */
Stefan Roesee373c5f2009-01-21 17:24:49 +0100102#define CONFIG_EHCI_MMIO_BIG_ENDIAN
103#define CONFIG_EHCI_DESC_BIG_ENDIAN
104#define CONFIG_EHCI_IS_TDI
105#define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
106#endif /* CONFIG_CMD_USB */
107
Stefan Roesee373c5f2009-01-21 17:24:49 +0100108#if defined(CONFIG_VCT_ONENAND)
109#define CONFIG_CMD_ONENAND
110#endif
111
112/*
113 * BOOTP options
114 */
115#define CONFIG_BOOTP_BOOTFILESIZE
116#define CONFIG_BOOTP_BOOTPATH
117#define CONFIG_BOOTP_GATEWAY
118#define CONFIG_BOOTP_HOSTNAME
119#define CONFIG_BOOTP_SUBNETMASK
120
121/*
122 * Miscellaneous configurable options
123 */
124#define CONFIG_SYS_LONGHELP /* undef to save memory */
Stefan Roesee373c5f2009-01-21 17:24:49 +0100125#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
126#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
127 sizeof(CONFIG_SYS_PROMPT) + 16)
128#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
129#define CONFIG_TIMESTAMP /* Print image info with timestamp */
130#define CONFIG_CMDLINE_EDITING /* add command line history */
Stefan Roesee373c5f2009-01-21 17:24:49 +0100131
132/*
133 * FLASH and environment organization
134 */
135#if defined(CONFIG_VCT_NOR)
Stefan Roesee373c5f2009-01-21 17:24:49 +0100136#define CONFIG_FLASH_NOT_MEM_MAPPED
137
138/*
139 * We need special accessor functions for the CFI FLASH driver. This
140 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
141 */
142#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
143
144/*
145 * For the non-memory-mapped NOR FLASH, we need to define the
146 * NOR FLASH area. This can't be detected via the addr2info()
147 * function, since we check for flash access in the very early
148 * U-Boot code, before the NOR FLASH is detected.
149 */
150#define CONFIG_FLASH_BASE 0xb0000000
151#define CONFIG_FLASH_END 0xbfffffff
152
153/*
154 * CFI driver settings
155 */
156#define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
157#define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
158#define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
159#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
160
161#define CONFIG_SYS_FLASH_BASE 0xb0000000
162#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
163#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
164#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
165
166#define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
167#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
168
169#ifdef CONFIG_ENV_IS_IN_FLASH
170#define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
171#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
172#define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
173
174/* Address and size of Redundant Environment Sector */
175#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
176#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
177#endif /* CONFIG_ENV_IS_IN_FLASH */
178#endif /* CONFIG_VCT_NOR */
179
180#if defined(CONFIG_VCT_ONENAND)
181#define CONFIG_USE_ONENAND_BOARD_INIT
Stefan Roesee373c5f2009-01-21 17:24:49 +0100182#define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
183#define CONFIG_SYS_FLASH_BASE 0x00000000
184#define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
185#define CONFIG_ENV_SIZE (128 << 10) /* erase size */
186#endif /* CONFIG_VCT_ONENAND */
187
188/*
Stefan Roesee373c5f2009-01-21 17:24:49 +0100189 * I2C/EEPROM
190 */
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100191#define CONFIG_SYS_I2C
192#define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
193#define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
194#define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
Stefan Roesee373c5f2009-01-21 17:24:49 +0100195
196/*
197 * Software (bit-bang) I2C driver configuration
198 */
199#define CONFIG_SYS_GPIO_I2C_SCL 11
200#define CONFIG_SYS_GPIO_I2C_SDA 10
201
202#ifndef __ASSEMBLY__
203int vct_gpio_dir(int pin, int dir);
204void vct_gpio_set(int pin, int val);
205int vct_gpio_get(int pin);
206#endif
207
208#define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
209#define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
210#define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
211#define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
212#define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
213#define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
214#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
215
216#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
217/* CAT24WC32 */
218#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
219#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
220 /* 32 byte page write mode using*/
221 /* last 5 bits of the address */
222#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
223
224#define CONFIG_BOOTCOMMAND "run test3"
Stefan Roesee373c5f2009-01-21 17:24:49 +0100225
226/*
Stefan Roesee373c5f2009-01-21 17:24:49 +0100227 * UBI configuration
228 */
229#if defined(CONFIG_VCT_ONENAND)
Stefan Roese5dc958f2009-05-12 14:32:58 +0200230#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Stefan Roesee373c5f2009-01-21 17:24:49 +0100231#define CONFIG_MTD_PARTITIONS
Stefan Roesee373c5f2009-01-21 17:24:49 +0100232
233#define MTDIDS_DEFAULT "onenand0=onenand"
234#define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
235 "128k(env)," \
236 "20m(kernel)," \
237 "-(rootfs)"
238#endif
239
240/*
241 * We need a small, stripped down image to fit into the first 128k OneNAND
242 * erase block (gzipped). This image only needs basic commands for FLASH
243 * (NOR/OneNAND) usage and Linux kernel booting.
244 */
245#if defined(CONFIG_VCT_SMALL_IMAGE)
Stefan Roesee373c5f2009-01-21 17:24:49 +0100246#undef CONFIG_CMD_STRINGS
247#undef CONFIG_CMD_TERMINAL
Stefan Roesee373c5f2009-01-21 17:24:49 +0100248
Ben Warrenfbfdd3a2009-07-20 22:01:11 -0700249#undef CONFIG_SMC911X
Heiko Schocher479a4cf2013-01-29 08:53:15 +0100250#undef CONFIG_SYS_I2C_SOFT
Wolfgang Denk85c25df2009-04-01 23:34:12 +0200251#undef CONFIG_SOURCE
Stefan Roesee373c5f2009-01-21 17:24:49 +0100252#undef CONFIG_SYS_LONGHELP
253#undef CONFIG_TIMESTAMP
254#endif /* CONFIG_VCT_SMALL_IMAGE */
255
256#endif /* __CONFIG_H */