Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Bluewater Systems Snapper 9G45 module |
| 3 | * |
| 4 | * (C) Copyright 2011 Bluewater Systems |
| 5 | * Author: Andre Renaud <andre@bluewatersys.com> |
| 6 | * Author: Ryan Mallon <ryan@bluewatersys.com> |
| 7 | * |
| 8 | * SPDX-License-Identifier: GPL-2.0+ |
| 9 | */ |
| 10 | |
| 11 | #ifndef __CONFIG_H |
| 12 | #define __CONFIG_H |
| 13 | |
| 14 | /* SoC type is defined in boards.cfg */ |
| 15 | #include <asm/hardware.h> |
| 16 | #include <linux/sizes.h> |
| 17 | |
| 18 | #define CONFIG_SYS_TEXT_BASE 0x73f00000 |
| 19 | |
| 20 | /* ARM asynchronous clock */ |
| 21 | #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ |
| 22 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
| 23 | |
| 24 | /* CPU */ |
| 25 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 26 | #define CONFIG_SETUP_MEMORY_TAGS |
| 27 | #define CONFIG_INITRD_TAG |
| 28 | #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 29 | |
| 30 | /* SDRAM */ |
| 31 | #define CONFIG_NR_DRAM_BANKS 1 |
| 32 | #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS6 |
| 33 | #define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024) /* 64MB */ |
| 34 | #define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM + 0x1000 - \ |
| 35 | GENERATED_GBL_DATA_SIZE) |
| 36 | |
| 37 | /* Mem test settings */ |
| 38 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 39 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + (1024 * 1024)) |
| 40 | |
| 41 | /* NAND Flash */ |
| 42 | #define CONFIG_NAND_ATMEL |
| 43 | #define CONFIG_ATMEL_NAND_HWECC |
| 44 | #define CONFIG_SYS_NAND_ECC_BASE ATMEL_BASE_ECC |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 45 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 46 | #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
| 47 | #define CONFIG_SYS_NAND_DBW_8 |
| 48 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) /* AD21 */ |
| 49 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) /* AD22 */ |
| 50 | #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
| 51 | #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 |
| 52 | |
| 53 | /* Ethernet */ |
| 54 | #define CONFIG_MACB |
Wenyou Yang | 7b81185 | 2016-05-17 13:11:35 +0800 | [diff] [blame] | 55 | #define CONFIG_PHYLIB |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 56 | #define CONFIG_RMII |
| 57 | #define CONFIG_NET_RETRY_COUNT 20 |
| 58 | #define CONFIG_RESET_PHY_R |
| 59 | #define CONFIG_AT91_WANTS_COMMON_PHY |
| 60 | #define CONFIG_TFTP_PORT |
| 61 | #define CONFIG_TFTP_TSIZE |
| 62 | |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 63 | /* MMC */ |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 64 | #define CONFIG_GENERIC_ATMEL_MCI |
| 65 | |
| 66 | /* LCD */ |
| 67 | #define CONFIG_ATMEL_LCD |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 68 | #define CONFIG_GURNARD_SPLASH |
| 69 | |
| 70 | #define CONFIG_ATMEL_SPI |
| 71 | |
| 72 | /* GPIOs and IO expander */ |
| 73 | #define CONFIG_ATMEL_LEGACY |
| 74 | #define CONFIG_AT91_GPIO |
| 75 | #define CONFIG_AT91_GPIO_PULLUP 1 |
| 76 | |
| 77 | /* UARTs/Serial console */ |
| 78 | #define CONFIG_ATMEL_USART |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 79 | |
| 80 | /* Boot options */ |
| 81 | #define CONFIG_SYS_LOAD_ADDR 0x23000000 |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 82 | |
| 83 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 84 | #define CONFIG_BOOTP_BOOTPATH |
| 85 | #define CONFIG_BOOTP_GATEWAY |
| 86 | #define CONFIG_BOOTP_HOSTNAME |
| 87 | |
| 88 | /* Environment settings */ |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 89 | #define CONFIG_ENV_OFFSET (512 << 10) |
| 90 | #define CONFIG_ENV_SIZE (256 << 10) |
| 91 | #define CONFIG_ENV_OVERWRITE |
| 92 | |
| 93 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 94 | "ethaddr=00:00:00:00:00:00\0" \ |
| 95 | "serial=0\0" \ |
| 96 | "stdout=serial_atmel\0" \ |
| 97 | "stderr=serial_atmel\0" \ |
| 98 | "stdin=serial_atmel\0" \ |
| 99 | "bootlimit=3\0" \ |
| 100 | "loadaddr=0x71000000\0" \ |
| 101 | "board_rev=2\0" \ |
| 102 | "bootfile=/tftpboot/uImage\0" \ |
| 103 | "bootargs_def=console=ttyS0,115200 panic=5 quiet lpj=997376\0" \ |
| 104 | "nfsroot=/export/root\0" \ |
| 105 | "boot_working=setenv bootargs $bootargs_def; nboot $loadaddr 0 0x20c0000 && bootm\0" \ |
| 106 | "boot_safe=setenv bootargs $bootargs_def; nboot $loadaddr 0 0xc0000 && bootm\0" \ |
| 107 | "boot_tftp=setenv bootargs $bootargs_def ip=any nfsroot=$nfsroot; setenv autoload y && bootp && bootm\0" \ |
| 108 | "boot_usb=setenv bootargs $bootargs_def; usb start && usb storage && fatload usb 0:1 $loadaddr dds-xm200.bin && bootm\0" \ |
| 109 | "boot_mmc=setenv bootargs $bootargs_def; mmc rescan && fatload mmc 0:1 $loadaddr dds-xm200.bin && bootm\0" \ |
| 110 | "bootcmd=run boot_mmc ; run boot_usb ; run boot_working ; run boot_safe\0" \ |
| 111 | "altbootcmd=run boot_mmc ; run boot_usb ; run boot_safe ; run boot_working\0" |
| 112 | |
| 113 | /* Console settings */ |
| 114 | #define CONFIG_SYS_CBSIZE 256 |
| 115 | #define CONFIG_SYS_MAXARGS 16 |
| 116 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 117 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 118 | #define CONFIG_SYS_LONGHELP |
| 119 | #define CONFIG_CMDLINE_EDITING |
| 120 | #define CONFIG_AUTO_COMPLETE |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 121 | |
| 122 | /* U-Boot memory settings */ |
| 123 | #define CONFIG_SYS_MALLOC_LEN (1 << 20) |
| 124 | |
| 125 | /* Command line configuration */ |
| 126 | #define CONFIG_CMD_PING |
| 127 | #define CONFIG_CMD_DHCP |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 128 | #define CONFIG_CMD_USB |
| 129 | #define CONFIG_CMD_MII |
| 130 | #define CONFIG_CMD_MMC |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 131 | #define CONFIG_CMD_CACHE |
Andre Renaud | 2369c9c | 2016-05-05 07:28:22 -0600 | [diff] [blame] | 132 | |
| 133 | #endif /* __CONFIG_H */ |