blob: 86ae19c9fbe10ff56f1f3897eb713b139fd047a3 [file] [log] [blame]
Stefan Roese7be1b9b2016-05-25 08:21:21 +02001/*
2 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
Stefan Roese5c806f12016-10-25 10:56:19 +02007#ifndef _CONFIG_MVEBU_ARMADA_8K_H
8#define _CONFIG_MVEBU_ARMADA_8K_H
Stefan Roese7be1b9b2016-05-25 08:21:21 +02009
10/*
11 * High Level Configuration Options (easy to change)
12 */
13#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
14
15#define CONFIG_DISPLAY_BOARDINFO_LATE
Stefan Roese7be1b9b2016-05-25 08:21:21 +020016
17#define CONFIG_SYS_TEXT_BASE 0x00000000
18
19/* additions for new ARM relocation support */
20#define CONFIG_SYS_SDRAM_BASE 0x00000000
21
22#define CONFIG_NR_DRAM_BANKS 1
23
24/* auto boot */
25#define CONFIG_PREBOOT
26
Stefan Roese7be1b9b2016-05-25 08:21:21 +020027#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
28 115200, 230400, 460800, 921600 }
29
30/*
31 * For booting Linux, the board info and command line data
32 * have to be in the first 8 MB of memory, since this is
33 * the maximum mapped by the Linux kernel during initialization.
34 */
35#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
36#define CONFIG_INITRD_TAG /* enable INITRD tag */
37#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
38
39#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
40#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
41 +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
42
43/*
44 * Size of malloc() pool
45 */
46#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
47
48/*
49 * Other required minimal configurations
50 */
51#define CONFIG_SYS_LONGHELP
52#define CONFIG_AUTO_COMPLETE
53#define CONFIG_CMDLINE_EDITING
Stefan Roese7be1b9b2016-05-25 08:21:21 +020054#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020055#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
56#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
57#define CONFIG_SYS_MEMTEST_END 0x00ffffff /*(_16M -1) */
58#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
59#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
60
Stefan Roese7be1b9b2016-05-25 08:21:21 +020061#define CONFIG_SYS_ALT_MEMTEST
62
63/* End of 16M scrubbed by training in bootrom */
64#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
65
66/*
67 * SPI Flash configuration
68 */
69#define CONFIG_KIRKWOOD_SPI
70#define CONFIG_ENV_SPI_BUS 0
71#define CONFIG_ENV_SPI_CS 0
72
73/* SPI NOR flash default params, used by sf commands */
74#define CONFIG_SF_DEFAULT_SPEED 1000000
75#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
76#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
77
78/* Environment in SPI NOR flash */
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030079#ifdef CONFIG_MVEBU_SPI_BOOT
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030080/* Environment in NAND flash */
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030081#endif
82
Stefan Roese7be1b9b2016-05-25 08:21:21 +020083#define CONFIG_ENV_OFFSET 0x180000 /* as Marvell U-Boot version */
84#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
85#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */
86
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030087#define CONFIG_SYS_MAX_NAND_DEVICE 1
88#define CONFIG_SYS_NAND_MAX_CHIPS 1
89#define CONFIG_SYS_NAND_ONFI_DETECTION
90#define CONFIG_SYS_NAND_USE_FLASH_BBT
91
Stefan Roese97c3ba02017-02-20 12:25:26 +010092/*
93 * Ethernet Driver configuration
94 */
95#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
96#define CONFIG_PHY_GIGE /* GbE speed/duplex detect */
97#define CONFIG_ARP_TIMEOUT 200
98#define CONFIG_NET_RETRY_COUNT 50
99
Bin Mengabe40262017-07-19 21:50:06 +0800100#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200101
102/* USB ethernet */
103#define CONFIG_USB_HOST_ETHER
104#define CONFIG_USB_ETHER_ASIX
105#define CONFIG_USB_ETHER_MCS7830
106#define CONFIG_USB_ETHER_RTL8152
107#define CONFIG_USB_ETHER_SMSC95XX
108
109/*
110 * SATA/SCSI/AHCI configuration
111 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +0200112#define CONFIG_SCSI_AHCI
113#define CONFIG_SCSI_AHCI_PLAT
114#define CONFIG_LIBATA
115#define CONFIG_LBA48
116#define CONFIG_SYS_64BIT_LBA
117
118#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
119#define CONFIG_SYS_SCSI_MAX_LUN 1
120#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
121 CONFIG_SYS_SCSI_MAX_LUN)
122
123#define CONFIG_SUPPORT_VFAT
124
Stefan Roesec20e9d52016-10-27 13:36:45 +0200125/*
126 * PCI configuration
127 */
128#ifdef CONFIG_PCIE_DW_MVEBU
129#define CONFIG_E1000
130#define CONFIG_CMD_PCI
131#endif
132
Stefan Roese5c806f12016-10-25 10:56:19 +0200133#endif /* _CONFIG_MVEBU_ARMADA_8K_H */