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Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +09001/*
2 * include/configs/lager.h
3 * This file is lager board configuration.
4 *
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +09005 * Copyright (C) 2013, 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +09006 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10#ifndef __LAGER_H
11#define __LAGER_H
12
13#undef DEBUG
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090014#define CONFIG_R8A7790
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090015#define CONFIG_ARCH_RMOBILE_BOARD_STRING "Lager"
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090016
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090017#include "rcar-gen2-common.h"
Nobuhiro Iwamatsue59703e2014-03-31 15:22:31 +090018
Nobuhiro Iwamatsu7c112732015-10-10 05:58:28 +090019#if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
Nobuhiro Iwamatsu2af4b002014-10-31 16:16:26 +090020#define CONFIG_SYS_TEXT_BASE 0xB0000000
21#else
Nobuhiro Iwamatsu00e4c8a2014-01-08 10:32:22 +090022#define CONFIG_SYS_TEXT_BASE 0xE8080000
Nobuhiro Iwamatsu2af4b002014-10-31 16:16:26 +090023#endif
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090024
25/* STACK */
Nobuhiro Iwamatsu2af4b002014-10-31 16:16:26 +090026#if defined(CONFIGF_RMOBILE_EXTRAM_BOOT)
27#define CONFIG_SYS_INIT_SP_ADDR 0xB003FFFC
28#else
29#define CONFIG_SYS_INIT_SP_ADDR 0xE827FFFC
30#endif
31#define STACK_AREA_SIZE 0xC000
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090032#define LOW_LEVEL_MERAM_STACK \
33 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34
35/* MEMORY */
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090036#define RCAR_GEN2_SDRAM_BASE 0x40000000
37#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
38#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090039
40/* SCIF */
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090041
Nobuhiro Iwamatsub6169ac2014-11-10 14:34:07 +090042/* SPI */
Nobuhiro Iwamatsu00e4c8a2014-01-08 10:32:22 +090043#define CONFIG_SPI
Nobuhiro Iwamatsu00e4c8a2014-01-08 10:32:22 +090044#define CONFIG_SH_QSPI
Nobuhiro Iwamatsu00e4c8a2014-01-08 10:32:22 +090045
Nobuhiro Iwamatsu0929b742013-10-20 20:28:24 +090046/* SH Ether */
Nobuhiro Iwamatsu0929b742013-10-20 20:28:24 +090047#define CONFIG_SH_ETHER
48#define CONFIG_SH_ETHER_USE_PORT 0
49#define CONFIG_SH_ETHER_PHY_ADDR 0x1
50#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
51#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
52#define CONFIG_SH_ETHER_CACHE_WRITEBACK
53#define CONFIG_SH_ETHER_CACHE_INVALIDATE
54#define CONFIG_PHYLIB
55#define CONFIG_PHY_MICREL
56#define CONFIG_BITBANGMII
57#define CONFIG_BITBANGMII_MULTI
58
Nobuhiro Iwamatsue2652e52013-09-30 10:08:40 +090059/* I2C */
60#define CONFIG_SYS_I2C
61#define CONFIG_SYS_I2C_RCAR
Nobuhiro Iwamatsue2652e52013-09-30 10:08:40 +090062#define CONFIG_SYS_RCAR_I2C0_SPEED 400000
Nobuhiro Iwamatsue2652e52013-09-30 10:08:40 +090063#define CONFIG_SYS_RCAR_I2C1_SPEED 400000
Nobuhiro Iwamatsue2652e52013-09-30 10:08:40 +090064#define CONFIG_SYS_RCAR_I2C2_SPEED 400000
Nobuhiro Iwamatsue2652e52013-09-30 10:08:40 +090065#define CONFIG_SYS_RCAR_I2C3_SPEED 400000
66#define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4
67
Nobuhiro Iwamatsua99b6b52013-10-10 09:13:41 +090068#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
69
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090070/* Board Clock */
Nobuhiro Iwamatsu18d337a2014-03-31 14:03:07 +090071#define RMOBILE_XTAL_CLK 20000000u
72#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
73#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */
74#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2)
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090075#define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2)
76#define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15)
Nobuhiro Iwamatsue2652e52013-09-30 10:08:40 +090077#define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12)
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090078
79#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +090080
Nobuhiro Iwamatsu12b4fb02014-03-27 14:14:58 +090081/* USB */
Nobuhiro Iwamatsu12b4fb02014-03-27 14:14:58 +090082#define CONFIG_USB_EHCI_RMOBILE
Nobuhiro Iwamatsua9c085f2014-07-28 15:29:31 +090083#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
Nobuhiro Iwamatsu12b4fb02014-03-27 14:14:58 +090084
Nobuhiro Iwamatsubaf336a2014-12-03 15:30:30 +090085/* MMC */
Nobuhiro Iwamatsubaf336a2014-12-03 15:30:30 +090086#define CONFIG_SH_MMCIF
87#define CONFIG_SH_MMCIF_ADDR 0xEE220000
88#define CONFIG_SH_MMCIF_CLK 97500000
89
Nobuhiro Iwamatsue02f1742014-12-02 16:52:24 +090090/* Module stop status bits */
91/* INTC-RT */
92#define CONFIG_SMSTP0_ENA 0x00400000
93/* MSIF */
94#define CONFIG_SMSTP2_ENA 0x00002000
95/* INTC-SYS, IRQC */
96#define CONFIG_SMSTP4_ENA 0x00000180
97/* SCIF0 */
98#define CONFIG_SMSTP7_ENA 0x00200000
99
Nobuhiro Iwamatsu4ca383a2014-11-21 10:19:32 +0900100/* SDHI */
101#define CONFIG_SH_SDHI_FREQ 97500000
102
Nobuhiro Iwamatsud74c8cf2013-11-21 17:06:46 +0900103#endif /* __LAGER_H */