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Rob Herring73089ad2011-10-24 08:50:20 +00001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Rob Herring73089ad2011-10-24 08:50:20 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Rob Herring5ed6a3d2014-04-10 16:17:30 -050010#include <config_distro_defaults.h>
11
Rob Herringb184c732013-06-12 22:24:47 -050012#define CONFIG_SYS_DCACHE_OFF
Rob Herring73089ad2011-10-24 08:50:20 +000013
Rob Herring73089ad2011-10-24 08:50:20 +000014#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
15
Rob Herring8ba859a2013-10-04 10:22:43 -050016#define CONFIG_SYS_TIMER_RATE (150000000/256)
17#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
18#define CONFIG_SYS_TIMER_COUNTS_DOWN
19
Rob Herring73089ad2011-10-24 08:50:20 +000020/*
21 * Size of malloc() pool
22 */
23#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
24
25#define CONFIG_PL011_SERIAL
26#define CONFIG_PL011_CLOCK 150000000
27#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
28#define CONFIG_CONS_INDEX 0
29
Rob Herring02fe7852012-02-01 16:57:54 +000030#define CONFIG_BOOTCOUNT_LIMIT
Stefan Roese033848e2012-08-16 17:55:41 +000031#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
32#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
Rob Herring02fe7852012-02-01 16:57:54 +000033#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
34
Rob Herring73089ad2011-10-24 08:50:20 +000035#define CONFIG_MISC_INIT_R
Rob Herring83f66482013-08-24 10:10:54 -050036#define CONFIG_LIBATA
Rob Herring73089ad2011-10-24 08:50:20 +000037#define CONFIG_SCSI_AHCI
38#define CONFIG_SCSI_AHCI_PLAT
39#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
40#define CONFIG_SYS_SCSI_MAX_LUN 1
41#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
42 CONFIG_SYS_SCSI_MAX_LUN)
43
Rob Herring6fd09422011-12-15 11:15:50 +000044#define CONFIG_CALXEDA_XGMAC
45
Rob Herring73089ad2011-10-24 08:50:20 +000046/*
47 * Command line configuration.
48 */
Rob Herring73089ad2011-10-24 08:50:20 +000049
Rob Herringfd5700b2013-06-12 22:24:51 -050050#define CONFIG_BOOT_RETRY_TIME -1
51#define CONFIG_RESET_TO_RETRY
Stefan Roese83da3f12015-05-18 14:08:23 +020052
Rob Herring73089ad2011-10-24 08:50:20 +000053/*
54 * Miscellaneous configurable options
55 */
Rob Herringb184c732013-06-12 22:24:47 -050056#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Rob Herring73089ad2011-10-24 08:50:20 +000057#define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
58#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Rob Herring73089ad2011-10-24 08:50:20 +000059/* Print Buffer Size */
60#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
61 sizeof(CONFIG_SYS_PROMPT)+16)
62
63#define CONFIG_SYS_LOAD_ADDR 0x800000
Rob Herringb184c732013-06-12 22:24:47 -050064#define CONFIG_SYS_64BIT_LBA
65
Rob Herring73089ad2011-10-24 08:50:20 +000066/*-----------------------------------------------------------------------
Rob Herring73089ad2011-10-24 08:50:20 +000067 * Physical Memory Map
Rob Herring0caae192015-06-21 00:29:55 +010068 * The DRAM is already setup, so do not touch the DT node later.
Rob Herring73089ad2011-10-24 08:50:20 +000069 */
Rob Herring0caae192015-06-21 00:29:55 +010070#define CONFIG_NR_DRAM_BANKS 0
Rob Herring73089ad2011-10-24 08:50:20 +000071#define PHYS_SDRAM_1_SIZE (4089 << 20)
72#define CONFIG_SYS_MEMTEST_START 0x100000
73#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
74
Jason Hobbs209432a2012-02-01 16:57:56 +000075/* Environment data setup
76*/
Jason Hobbs209432a2012-02-01 16:57:56 +000077#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
78#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
79#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
80#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
Rob Herring73089ad2011-10-24 08:50:20 +000081
82#define CONFIG_SYS_SDRAM_BASE 0x00000000
Rob Herring847536a2012-02-01 16:57:53 +000083#define CONFIG_SYS_TEXT_BASE 0x00008000
Rob Herring73089ad2011-10-24 08:50:20 +000084#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
85#define CONFIG_SKIP_LOWLEVEL_INIT
86
87#endif