Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 1 | /* |
Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 2 | * Copyright 2015-2016 Toradex, Inc. |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 3 | * |
Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 4 | * Configuration settings for the Toradex VF50/VF61 modules. |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 5 | * |
| 6 | * Based on vf610twr.h: |
| 7 | * Copyright 2013 Freescale Semiconductor, Inc. |
| 8 | * |
| 9 | * SPDX-License-Identifier: GPL-2.0+ |
| 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
| 15 | #include <asm/arch/imx-regs.h> |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 16 | |
Gong Qianyu | 52de2e5 | 2015-10-26 19:47:42 +0800 | [diff] [blame] | 17 | #define CONFIG_SYS_FSL_CLK |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 18 | |
Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 19 | #define CONFIG_DISPLAY_BOARDINFO_LATE /* Calls show_board_info() */ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 20 | |
| 21 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 22 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 23 | #ifdef CONFIG_CMD_FUSE |
| 24 | #define CONFIG_MXC_OCOTP |
| 25 | #endif |
| 26 | |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 27 | #ifdef CONFIG_VIDEO_FSL_DCU_FB |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 28 | #define CONFIG_SPLASH_SCREEN_ALIGN |
| 29 | #define CONFIG_VIDEO_LOGO |
| 30 | #define CONFIG_VIDEO_BMP_LOGO |
| 31 | #define CONFIG_SYS_FSL_DCU_LE |
| 32 | |
| 33 | #define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR |
| 34 | #define DCU_LAYER_MAX_NUM 64 |
| 35 | #endif |
| 36 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 37 | /* Size of malloc() pool */ |
| 38 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) |
| 39 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 40 | /* Allow to overwrite serial and ethaddr */ |
| 41 | #define CONFIG_ENV_OVERWRITE |
Marcel Ziswiler | d92dee5 | 2016-11-16 17:49:23 +0100 | [diff] [blame] | 42 | #define CONFIG_ENV_VARS_UBOOT_CONFIG |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 43 | #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 44 | |
| 45 | /* NAND support */ |
Stefan Agner | 4ce682a | 2015-05-08 19:07:13 +0200 | [diff] [blame] | 46 | #define CONFIG_SYS_NAND_ONFI_DETECTION |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 47 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 48 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR |
| 49 | |
| 50 | /* Dynamic MTD partition support */ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 51 | #define CONFIG_MTD_PARTITIONS |
| 52 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
| 53 | #define MTDIDS_DEFAULT "nand0=vf610_nfc" |
| 54 | #define MTDPARTS_DEFAULT "mtdparts=vf610_nfc:" \ |
| 55 | "128k(vf-bcb)ro," \ |
| 56 | "1408k(u-boot)ro," \ |
| 57 | "512k(u-boot-env)," \ |
| 58 | "-(ubi)" |
| 59 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 60 | #define CONFIG_FSL_ESDHC |
| 61 | #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| 62 | #define CONFIG_SYS_FSL_ESDHC_NUM 1 |
| 63 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 64 | #define CONFIG_FEC_MXC |
| 65 | #define CONFIG_MII |
| 66 | #define IMX_FEC_BASE ENET1_BASE_ADDR |
| 67 | #define CONFIG_FEC_XCV_TYPE RMII |
| 68 | #define CONFIG_FEC_MXC_PHYADDR 0 |
| 69 | #define CONFIG_PHYLIB |
| 70 | #define CONFIG_PHY_MICREL |
| 71 | |
| 72 | #define CONFIG_IPADDR 192.168.10.2 |
| 73 | #define CONFIG_NETMASK 255.255.255.0 |
| 74 | #define CONFIG_SERVERIP 192.168.10.1 |
| 75 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 76 | #define CONFIG_LOADADDR 0x80008000 |
| 77 | #define CONFIG_FDTADDR 0x84000000 |
| 78 | |
| 79 | /* We boot from the gfxRAM area of the OCRAM. */ |
| 80 | #define CONFIG_SYS_TEXT_BASE 0x3f408000 |
| 81 | #define CONFIG_BOARD_SIZE_LIMIT 524288 |
| 82 | |
| 83 | #define SD_BOOTCMD \ |
| 84 | "sdargs=root=/dev/mmcblk0p2 rw rootwait\0" \ |
| 85 | "sdboot=run setup; setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \ |
| 86 | "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \ |
| 87 | "load mmc 0:2 ${kernel_addr_r} /boot/${kernel_file} && " \ |
| 88 | "load mmc 0:2 ${fdt_addr_r} /boot/${soc}-colibri-${fdt_board}.dtb && " \ |
Sanchayan Maity | a48b427 | 2016-12-02 14:28:27 +0530 | [diff] [blame] | 89 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 90 | |
| 91 | #define NFS_BOOTCMD \ |
| 92 | "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \ |
| 93 | "nfsboot=run setup; " \ |
| 94 | "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \ |
| 95 | "${setupargs} ${vidargs}; echo Booting from NFS...;" \ |
| 96 | "dhcp ${kernel_addr_r} && " \ |
| 97 | "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \ |
Sanchayan Maity | a48b427 | 2016-12-02 14:28:27 +0530 | [diff] [blame] | 98 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 99 | |
| 100 | #define UBI_BOOTCMD \ |
| 101 | "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \ |
| 102 | "ubi.fm_autoconvert=1\0" \ |
| 103 | "ubiboot=run setup; " \ |
| 104 | "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \ |
| 105 | "${setupargs} ${vidargs}; echo Booting from NAND...; " \ |
Sanchayan Maity | 27e4e10 | 2016-11-25 16:19:17 +0530 | [diff] [blame] | 106 | "ubi part ubi && " \ |
| 107 | "ubi read ${kernel_addr_r} kernel && " \ |
| 108 | "ubi read ${fdt_addr_r} dtb && " \ |
Sanchayan Maity | a48b427 | 2016-12-02 14:28:27 +0530 | [diff] [blame] | 109 | "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 110 | |
| 111 | #define CONFIG_BOOTCOMMAND "run ubiboot; run sdboot; run nfsboot" |
| 112 | |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 113 | #define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4" |
| 114 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 115 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 116 | "kernel_addr_r=0x82000000\0" \ |
| 117 | "fdt_addr_r=0x84000000\0" \ |
| 118 | "kernel_file=zImage\0" \ |
| 119 | "fdt_file=${soc}-colibri-${fdt_board}.dtb\0" \ |
| 120 | "fdt_board=eval-v3\0" \ |
Sanchayan Maity | a48b427 | 2016-12-02 14:28:27 +0530 | [diff] [blame] | 121 | "fdt_fixup=;\0" \ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 122 | "defargs=\0" \ |
| 123 | "console=ttyLP0\0" \ |
| 124 | "setup=setenv setupargs " \ |
| 125 | "console=tty1 console=${console}" \ |
| 126 | ",${baudrate}n8 ${memargs}\0" \ |
| 127 | "setsdupdate=mmc rescan && set interface mmc && " \ |
| 128 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ |
| 129 | "source ${loadaddr}\0" \ |
| 130 | "setusbupdate=usb start && set interface usb && " \ |
| 131 | "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \ |
| 132 | "source ${loadaddr}\0" \ |
| 133 | "setupdate=run setsdupdate || run setusbupdate\0" \ |
| 134 | "mtdparts=" MTDPARTS_DEFAULT "\0" \ |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 135 | "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \ |
Stefan Agner | 1301175 | 2017-04-11 11:12:14 +0530 | [diff] [blame] | 136 | "video-mode=dcufb:640x480-16@60,monitor=lcd\0" \ |
| 137 | "splashpos=m,m\0" \ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 138 | SD_BOOTCMD \ |
| 139 | NFS_BOOTCMD \ |
| 140 | UBI_BOOTCMD |
| 141 | |
| 142 | /* Miscellaneous configurable options */ |
| 143 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 144 | #undef CONFIG_AUTO_COMPLETE |
Sanchayan Maity | 0d92de4 | 2015-06-08 12:40:41 +0530 | [diff] [blame] | 145 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 146 | #define CONFIG_SYS_PBSIZE \ |
| 147 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 148 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 149 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
| 150 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 151 | #define CONFIG_SYS_MEMTEST_START 0x80010000 |
| 152 | #define CONFIG_SYS_MEMTEST_END 0x87C00000 |
| 153 | |
| 154 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 155 | #define CONFIG_SYS_HZ 1000 |
| 156 | #define CONFIG_CMDLINE_EDITING |
| 157 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 158 | /* Physical memory map */ |
| 159 | #define CONFIG_NR_DRAM_BANKS 1 |
| 160 | #define PHYS_SDRAM (0x80000000) |
| 161 | #define PHYS_SDRAM_SIZE (256 * 1024 * 1024) |
| 162 | |
| 163 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 164 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 165 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 166 | |
| 167 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 168 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 169 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 170 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 171 | |
| 172 | /* Environment organization */ |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 173 | |
| 174 | #ifdef CONFIG_ENV_IS_IN_MMC |
| 175 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 176 | #define CONFIG_ENV_OFFSET (12 * 64 * 1024) |
| 177 | #define CONFIG_ENV_SIZE (8 * 1024) |
| 178 | #endif |
| 179 | |
| 180 | #ifdef CONFIG_ENV_IS_IN_NAND |
| 181 | #define CONFIG_ENV_SIZE (64 * 2048) |
| 182 | #define CONFIG_ENV_RANGE (4 * 64 * 2048) |
| 183 | #define CONFIG_ENV_OFFSET (12 * 64 * 2048) |
| 184 | #endif |
| 185 | |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 186 | /* USB Host Support */ |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 187 | #define CONFIG_USB_EHCI_VF |
| 188 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 |
| 189 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 190 | |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 191 | /* USB DFU */ |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 192 | #define CONFIG_SYS_DFU_DATA_BUF_SIZE (1024 * 1024) |
| 193 | |
| 194 | /* USB Storage */ |
Paul Kocialkowski | 045d605 | 2015-06-12 19:56:58 +0200 | [diff] [blame] | 195 | #define CONFIG_USB_FUNCTION_MASS_STORAGE |
Sanchayan Maity | 7755e53 | 2015-04-17 18:56:42 +0530 | [diff] [blame] | 196 | |
Sanchayan Maity | cc4d78f | 2015-04-15 16:24:26 +0530 | [diff] [blame] | 197 | #endif /* __CONFIG_H */ |