Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 1f27ce81ffd9fe93ee87d6432b355417fc5cd40e / . / configs / stm32f469-discovery_defconfig
blob: b7e35aeae20060f52c2e3fe9ee608ddeadc7a06a [file] [log] [blame]
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]1CONFIG_ARM=y
Trevor Woerner2bcc1ed2020-05-06 08:02:42 -0400[diff] [blame]2CONFIG_ARCH_STM32=y
Simon Glass72cc5382022-10-20 18:22:39 -0600[diff] [blame]3CONFIG_TEXT_BASE=0x08000000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x100000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]5CONFIG_NR_DRAM_BANKS=1
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]6CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
7CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000
Tom Rini2e262c42020-08-10 15:31:07 -0400[diff] [blame]8CONFIG_ENV_SIZE=0x2000
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]9CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]10CONFIG_STM32F4=y
11CONFIG_TARGET_STM32F469_DISCOVERY=y
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]12CONFIG_SYS_LOAD_ADDR=0x400000
Tom Rini4b2fcb32022-04-08 13:36:51 -0400[diff] [blame]13CONFIG_DISTRO_DEFAULTS=y
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]14CONFIG_BOOTDELAY=3
15# CONFIG_DISPLAY_CPUINFO is not set
Tom Rinif92b6fa2020-10-09 12:22:06 -0400[diff] [blame]16CONFIG_MISC_INIT_R=y
Tom Rinic4359852023-10-02 10:35:27 -0400[diff] [blame]17CONFIG_SYS_PROMPT="U-Boot > "
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]18CONFIG_SYS_PBSIZE=1050
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]19CONFIG_CMD_IMLS=y
20CONFIG_CMD_GPT=y
21# CONFIG_RANDOM_UUID is not set
22CONFIG_CMD_MMC=y
23# CONFIG_CMD_SETEXPR is not set
Dario Binacchi72288622023-12-11 23:05:55 +0100[diff] [blame]24CONFIG_CMD_BMP=y
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]25CONFIG_CMD_CACHE=y
26CONFIG_CMD_TIMER=y
Patrice Chotard1e719da2018-08-03 11:46:20 +0200[diff] [blame]27# CONFIG_ISO_PARTITION is not set
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]28CONFIG_OF_CONTROL=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]29CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Patrice Chotardf1a7bbf2019-09-17 10:09:43 +0200[diff] [blame]30# CONFIG_NET is not set
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]31CONFIG_ARM_PL180_MMCI=y
Tom Rinie799f922019-12-04 17:18:38 -0500[diff] [blame]32CONFIG_MTD=y
Miquel Raynala903be42019-10-03 19:50:04 +0200[diff] [blame]33CONFIG_DM_MTD=y
Patrice Chotard73ef2f02017-12-12 09:49:44 +0100[diff] [blame]34CONFIG_MTD_NOR_FLASH=y
Patrick Delaunay754ff3b2021-10-04 11:05:52 +0200[diff] [blame]35CONFIG_STM32_FLASH=y
Tom Rinid38112c2022-07-23 13:05:04 -0400[diff] [blame]36CONFIG_SYS_MAX_FLASH_SECT=12
Patrick Delaunay1576abf2022-01-04 14:24:00 +0100[diff] [blame]37CONFIG_SYS_MAX_FLASH_BANKS=2
Patrice Chotardf22f4842019-04-30 16:55:56 +0200[diff] [blame]38CONFIG_DM_SPI_FLASH=y
Patrice Chotardf22f4842019-04-30 16:55:56 +0200[diff] [blame]39CONFIG_SPI_FLASH_STMICRO=y
Patrice Chotard57642482019-05-06 11:15:16 +0200[diff] [blame]40# CONFIG_PINCTRL_FULL is not set
Patrice Chotardf22f4842019-04-30 16:55:56 +0200[diff] [blame]41CONFIG_SPI=y
42CONFIG_DM_SPI=y
43CONFIG_STM32_QSPI=y
Dario Binacchi72288622023-12-11 23:05:55 +0100[diff] [blame]44CONFIG_VIDEO=y
Dario Binacchi1f27ce82023-12-11 23:05:56 +0100[diff] [blame^]45CONFIG_VIDEO_LOGO=y
Dario Binacchi72288622023-12-11 23:05:55 +0100[diff] [blame]46CONFIG_BACKLIGHT_GPIO=y
47CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
48CONFIG_VIDEO_STM32=y
49CONFIG_VIDEO_STM32_DSI=y
50CONFIG_VIDEO_STM32_MAX_XRES=480
51CONFIG_VIDEO_STM32_MAX_YRES=800
Dario Binacchi1f27ce82023-12-11 23:05:56 +0100[diff] [blame^]52CONFIG_SPLASH_SCREEN=y
53CONFIG_SPLASH_SCREEN_ALIGN=y
Dario Binacchi72288622023-12-11 23:05:55 +0100[diff] [blame]54CONFIG_BMP_16BPP=y
55CONFIG_BMP_24BPP=y
56CONFIG_BMP_32BPP=y
57CONFIG_DM_REGULATOR=y
58CONFIG_DM_REGULATOR_FIXED=y