Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 2 | /* |
Patrice Chotard | 789ee0e | 2017-10-23 09:53:58 +0200 | [diff] [blame] | 3 | * Copyright (C) 2017, STMicroelectronics - All Rights Reserved |
| 4 | * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics. |
Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 9 | #include <init.h> |
Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 10 | |
| 11 | DECLARE_GLOBAL_DATA_PTR; |
| 12 | |
| 13 | int dram_init(void) |
| 14 | { |
| 15 | struct udevice *dev; |
| 16 | int ret; |
| 17 | |
| 18 | ret = uclass_get_device(UCLASS_RAM, 0, &dev); |
| 19 | if (ret) { |
| 20 | debug("DRAM init failed: %d\n", ret); |
| 21 | return ret; |
| 22 | } |
| 23 | |
Siva Durga Prasad Paladugu | b3d55ea | 2018-07-16 15:56:11 +0530 | [diff] [blame] | 24 | if (fdtdec_setup_mem_size_base() != 0) |
Patrice Chotard | 1e1d02d | 2017-09-13 18:00:12 +0200 | [diff] [blame] | 25 | ret = -EINVAL; |
| 26 | |
| 27 | return ret; |
| 28 | } |
| 29 | |
| 30 | int dram_init_banksize(void) |
| 31 | { |
| 32 | fdtdec_setup_memory_banksize(); |
| 33 | |
| 34 | return 0; |
| 35 | } |
| 36 | |
| 37 | int board_early_init_f(void) |
| 38 | { |
| 39 | return 0; |
| 40 | } |
| 41 | |
| 42 | u32 get_board_rev(void) |
| 43 | { |
| 44 | return 0; |
| 45 | } |
| 46 | |
| 47 | int board_late_init(void) |
| 48 | { |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | int board_init(void) |
| 53 | { |
| 54 | gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100; |
| 55 | return 0; |
| 56 | } |