Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2011 |
| 4 | * egnite GmbH <info@egnite.de> |
| 5 | * |
| 6 | * Configuation settings for Ethernut 5 with AT91SAM9XE. |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
| 12 | #include <asm/hardware.h> |
| 13 | |
| 14 | /* The first stage boot loader expects u-boot running at this address. */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 15 | |
| 16 | /* The first stage boot loader takes care of low level initialization. */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 17 | |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 18 | /* CPU information */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 19 | |
| 20 | /* ARM asynchronous clock */ |
| 21 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
| 22 | #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 23 | |
| 24 | /* 32kB internal SRAM */ |
| 25 | #define CONFIG_SRAM_BASE 0x00300000 /*AT91SAM9XE_SRAM_BASE */ |
| 26 | #define CONFIG_SRAM_SIZE (32 << 10) |
Rob Herring | 72e6d65 | 2012-07-13 09:44:01 +0000 | [diff] [blame] | 27 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \ |
| 28 | GENERATED_GBL_DATA_SIZE) |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 29 | |
| 30 | /* 128MB SDRAM in 1 bank */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 31 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 32 | #define CONFIG_SYS_SDRAM_SIZE (128 << 20) |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 33 | |
| 34 | /* 512kB on-chip NOR flash */ |
| 35 | # define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 36 | # define CONFIG_SYS_FLASH_BASE 0x00200000 /* AT91SAM9XE_FLASH_BASE */ |
| 37 | # define CONFIG_AT91_EFLASH |
| 38 | # define CONFIG_SYS_MAX_FLASH_SECT 32 |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 39 | # define CONFIG_EFLASH_PROTSECTORS 1 |
| 40 | |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 41 | |
Wenyou.Yang@microchip.com | c99bfb4 | 2017-07-21 14:30:57 +0800 | [diff] [blame] | 42 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 43 | |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 44 | /* NAND flash */ |
| 45 | #ifdef CONFIG_CMD_NAND |
| 46 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 47 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 48 | #define CONFIG_SYS_NAND_DBW_8 |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 49 | /* our ALE is AD21 */ |
| 50 | #define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
| 51 | /* our CLE is AD22 */ |
| 52 | #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
Andreas Bießmann | a4c24d3 | 2013-11-29 12:13:45 +0100 | [diff] [blame] | 53 | #define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14) |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 54 | #endif |
| 55 | |
| 56 | /* JFFS2 */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 57 | |
| 58 | /* Ethernet */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 59 | #define CONFIG_NET_RETRY_COUNT 20 |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 60 | #define CONFIG_RMII |
| 61 | #define CONFIG_PHY_ID 0 |
| 62 | #define CONFIG_MACB_SEARCH_PHY |
| 63 | |
| 64 | /* MMC */ |
| 65 | #ifdef CONFIG_CMD_MMC |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 66 | #define CONFIG_SYS_MMC_CD_PIN AT91_PIO_PORTC, 8 |
| 67 | #endif |
| 68 | |
| 69 | /* USB */ |
| 70 | #ifdef CONFIG_CMD_USB |
| 71 | #define CONFIG_USB_ATMEL |
Bo Shen | 4a985df | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 72 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 73 | #define CONFIG_USB_OHCI_NEW |
| 74 | #define CONFIG_SYS_USB_OHCI_CPU_INIT |
| 75 | #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 |
| 76 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "host" |
| 77 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 78 | #endif |
| 79 | |
| 80 | /* RTC */ |
| 81 | #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP) |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 82 | #define CONFIG_SYS_I2C_RTC_ADDR 0x51 |
| 83 | #endif |
| 84 | |
| 85 | /* I2C */ |
| 86 | #define CONFIG_SYS_MAX_I2C_BUS 1 |
Heiko Schocher | 479a4cf | 2013-01-29 08:53:15 +0100 | [diff] [blame] | 87 | |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 88 | #define I2C_SOFT_DECLARATIONS |
| 89 | |
| 90 | #define GPIO_I2C_SCL AT91_PIO_PORTA, 24 |
| 91 | #define GPIO_I2C_SDA AT91_PIO_PORTA, 23 |
| 92 | |
| 93 | #define I2C_INIT { \ |
| 94 | at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \ |
| 95 | at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \ |
| 96 | at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \ |
| 97 | at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \ |
| 98 | at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \ |
| 99 | } |
| 100 | |
| 101 | #define I2C_ACTIVE at91_set_pio_output(AT91_PIO_PORTA, 23, 0) |
| 102 | #define I2C_TRISTATE at91_set_pio_input(AT91_PIO_PORTA, 23, 0) |
| 103 | #define I2C_SCL(bit) at91_set_pio_value(AT91_PIO_PORTA, 24, bit) |
| 104 | #define I2C_SDA(bit) at91_set_pio_value(AT91_PIO_PORTA, 23, bit) |
| 105 | #define I2C_DELAY udelay(100) |
| 106 | #define I2C_READ at91_get_pio_value(AT91_PIO_PORTA, 23) |
| 107 | |
| 108 | /* DHCP/BOOTP options */ |
| 109 | #ifdef CONFIG_CMD_DHCP |
| 110 | #define CONFIG_BOOTP_BOOTFILESIZE |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 111 | #define CONFIG_SYS_AUTOLOAD "n" |
| 112 | #endif |
| 113 | |
| 114 | /* File systems */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 115 | |
| 116 | /* Boot command */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 117 | |
| 118 | /* Misc. u-boot settings */ |
Tim Schendekehl | 024b61c | 2011-11-01 23:55:01 +0000 | [diff] [blame] | 119 | |
| 120 | #endif |