Blame - include/configs/koelsch.h - filogic/uboot

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Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	1	/*
				2	* include/configs/koelsch.h
				3	*
				4	* Copyright (C) 2013 Renesas Electronics Corporation
				5	*
				6	* SPDX-License-Identifier: GPL-2.0
				7	*/
				8
				9	#ifndef __KOELSCH_H
				10	#define __KOELSCH_H
				11
				12	#undef DEBUG
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	13	#define CONFIG_R8A7791
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	14	#define CONFIG_RMOBILE_BOARD_STRING "Koelsch"
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	15
Nobuhiro Iwamatsu	b6169ac	2014-11-10 14:34:07 +0900	[diff] [blame]	16	#include "rcar-gen2-common.h"
Nobuhiro Iwamatsu	04207bc	2014-03-31 15:22:31 +0900	[diff] [blame]	17
Nobuhiro Iwamatsu	25c0dca	2014-10-31 16:16:27 +0900	[diff] [blame]	18	#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
				19	#define CONFIG_SYS_TEXT_BASE 0x70000000
				20	#else
Nobuhiro Iwamatsu	1484dd8	2014-01-08 10:32:24 +0900	[diff] [blame]	21	#define CONFIG_SYS_TEXT_BASE 0xE6304000
Nobuhiro Iwamatsu	25c0dca	2014-10-31 16:16:27 +0900	[diff] [blame]	22	#endif
				23
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	24	/* STACK */
Nobuhiro Iwamatsu	25c0dca	2014-10-31 16:16:27 +0900	[diff] [blame]	25	#if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
				26	#define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC
				27	#else
				28	#define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC
				29	#endif
				30
				31	#define STACK_AREA_SIZE 0xC000
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	32	#define LOW_LEVEL_MERAM_STACK \
				33	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
				34
				35	/* MEMORY */
Nobuhiro Iwamatsu	b6169ac	2014-11-10 14:34:07 +0900	[diff] [blame]	36	#define RCAR_GEN2_SDRAM_BASE 0x40000000
				37	#define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024)
				38	#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	39
				40	/* SCIF */
				41	#define CONFIG_SCIF_CONSOLE
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	42
				43	/* FLASH */
Nobuhiro Iwamatsu	1484dd8	2014-01-08 10:32:24 +0900	[diff] [blame]	44	#define CONFIG_SYS_NO_FLASH
				45	#define CONFIG_SPI
				46	#define CONFIG_SH_QSPI
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	47
Nobuhiro Iwamatsu	157585e	2013-10-20 20:37:17 +0900	[diff] [blame]	48	/* SH Ether */
Nobuhiro Iwamatsu	157585e	2013-10-20 20:37:17 +0900	[diff] [blame]	49	#define CONFIG_SH_ETHER
				50	#define CONFIG_SH_ETHER_USE_PORT 0
				51	#define CONFIG_SH_ETHER_PHY_ADDR 0x1
				52	#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
				53	#define CONFIG_SH_ETHER_CACHE_WRITEBACK
				54	#define CONFIG_SH_ETHER_CACHE_INVALIDATE
				55	#define CONFIG_PHYLIB
				56	#define CONFIG_PHY_MICREL
				57	#define CONFIG_BITBANGMII
				58	#define CONFIG_BITBANGMII_MULTI
				59	#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
				60
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	61	/* Board Clock */
Nobuhiro Iwamatsu	c7922f3	2014-03-31 11:06:46 +0900	[diff] [blame]	62	#define RMOBILE_XTAL_CLK 20000000u
				63	#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
				64	#define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	65	#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	66
Nobuhiro Iwamatsu	2546d4f	2013-09-11 15:04:33 +0900	[diff] [blame]	67	/* i2c */
Nobuhiro Iwamatsu	2546d4f	2013-09-11 15:04:33 +0900	[diff] [blame]	68	#define CONFIG_SYS_I2C
				69	#define CONFIG_SYS_I2C_SH
				70	#define CONFIG_SYS_I2C_SLAVE 0x7F
				71	#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3
Nobuhiro Iwamatsu	2546d4f	2013-09-11 15:04:33 +0900	[diff] [blame]	72	#define CONFIG_SYS_I2C_SH_SPEED0 400000
Nobuhiro Iwamatsu	2546d4f	2013-09-11 15:04:33 +0900	[diff] [blame]	73	#define CONFIG_SYS_I2C_SH_SPEED1 400000
Nobuhiro Iwamatsu	2546d4f	2013-09-11 15:04:33 +0900	[diff] [blame]	74	#define CONFIG_SYS_I2C_SH_SPEED2 400000
				75	#define CONFIG_SH_I2C_DATA_HIGH 4
				76	#define CONFIG_SH_I2C_DATA_LOW 5
				77	#define CONFIG_SH_I2C_CLOCK 10000000
				78
Nobuhiro Iwamatsu	6c57c16	2013-10-10 10:48:20 +0900	[diff] [blame]	79	#define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
				80
Nobuhiro Iwamatsu	e7c981e	2014-03-27 14:13:06 +0900	[diff] [blame]	81	/* USB */
				82	#define CONFIG_USB_EHCI
				83	#define CONFIG_USB_EHCI_RMOBILE
Nobuhiro Iwamatsu	a9c085f	2014-07-28 15:29:31 +0900	[diff] [blame]	84	#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Nobuhiro Iwamatsu	e7c981e	2014-03-27 14:13:06 +0900	[diff] [blame]	85	#define CONFIG_USB_STORAGE
				86
Nobuhiro Iwamatsu	e02f174	2014-12-02 16:52:24 +0900	[diff] [blame]	87	/* Module stop status bits */
				88	/* INTC-RT */
				89	#define CONFIG_SMSTP0_ENA 0x00400000
				90	/* MSIF*/
				91	#define CONFIG_SMSTP2_ENA 0x00002000
				92	/* INTC-SYS, IRQC */
				93	#define CONFIG_SMSTP4_ENA 0x00000180
				94	/* SCIF0 */
				95	#define CONFIG_SMSTP7_ENA 0x00200000
				96
Nobuhiro Iwamatsu	af33ae7	2014-11-12 13:03:54 +0900	[diff] [blame]	97	/* SD */
				98	#define CONFIG_MMC
Nobuhiro Iwamatsu	af33ae7	2014-11-12 13:03:54 +0900	[diff] [blame]	99	#define CONFIG_GENERIC_MMC
				100	#define CONFIG_SH_SDHI_FREQ 97500000
				101
Nobuhiro Iwamatsu	7fbb92b	2013-11-21 17:07:46 +0900	[diff] [blame]	102	#endif /* __KOELSCH_H */