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git01.mediatek.com / filogic / uboot / 1ee79550cdf6ae8430157bc3875ad89e7245ae26 / . / arch / arm / mach-tegra / sys_info.c
blob: 5dc998a52b24412628337cd7c16d2e4dcf027894 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Tom Warren41b68382011-01-27 10:58:05 +0000[diff] [blame]2/*
3 * (C) Copyright 2010,2011
4 * NVIDIA Corporation <www.nvidia.com>
Tom Warren41b68382011-01-27 10:58:05 +0000[diff] [blame]5 */
6
7#include <common.h>
Tom Warren61c6d0e2012-12-11 13:34:15 +0000[diff] [blame]8#include <linux/ctype.h>
Dominik Sliwa4e9c07f2019-08-01 11:06:37 +0300[diff] [blame]9#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30)
10#include <asm/arch-tegra/pmc.h>
Tom Warren41b68382011-01-27 10:58:05 +0000[diff] [blame]11
Dominik Sliwa4e9c07f2019-08-01 11:06:37 +0300[diff] [blame]12static char *get_reset_cause(void)
Tom Warren61c6d0e2012-12-11 13:34:15 +0000[diff] [blame]13{
Dominik Sliwa4e9c07f2019-08-01 11:06:37 +0300[diff] [blame]14 struct pmc_ctlr *pmc = (struct pmc_ctlr *)NV_PA_PMC_BASE;
15
16 switch (pmc->pmc_reset_status) {
17 case 0x00:
18 return "POR";
19 case 0x01:
20 return "WATCHDOG";
21 case 0x02:
22 return "SENSOR";
23 case 0x03:
24 return "SW_MAIN";
25 case 0x04:
26 return "LP0";
Tom Warren61c6d0e2012-12-11 13:34:15 +0000[diff] [blame]27 }
Dominik Sliwa4e9c07f2019-08-01 11:06:37 +0300[diff] [blame]28 return "UNKNOWN";
Tom Warren61c6d0e2012-12-11 13:34:15 +0000[diff] [blame]29}
Dominik Sliwa4e9c07f2019-08-01 11:06:37 +0300[diff] [blame]30#endif
Tom Warren61c6d0e2012-12-11 13:34:15 +0000[diff] [blame]31
Tom Warren41b68382011-01-27 10:58:05 +0000[diff] [blame]32/* Print CPU information */
33int print_cpuinfo(void)
34{
Dominik Sliwa4e9c07f2019-08-01 11:06:37 +0300[diff] [blame]35 printf("SoC: %s\n", CONFIG_SYS_SOC);
36#if defined(CONFIG_TEGRA124) || defined(CONFIG_TEGRA30)
37 printf("Reset cause: %s\n", get_reset_cause());
38#endif
Tom Warren41b68382011-01-27 10:58:05 +0000[diff] [blame]39
40 /* TBD: Add printf of major/minor rev info, stepping, etc. */
41 return 0;
42}