blob: 2eb571050a33aa8911e616893da470f84dd6e889 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vitaly Andrianov0e902872014-04-04 13:16:49 -04002/*
3 * (C) Copyright 2012-2014
4 * Texas Instruments Incorporated, <www.ti.com>
Vitaly Andrianov0e902872014-04-04 13:16:49 -04005 */
6
7#include <common.h>
Simon Glass495a5dc2019-11-14 12:57:30 -07008#include <time.h>
Vitaly Andrianov0e902872014-04-04 13:16:49 -04009#include <asm/io.h>
10#include <div64.h>
Patrick Delaunaycfab8482016-11-22 17:31:33 +010011#include <bootstage.h>
Vitaly Andrianov0e902872014-04-04 13:16:49 -040012
13DECLARE_GLOBAL_DATA_PTR;
14
Patrick Delaunayb3c5a9f2018-03-20 11:41:23 +010015#ifndef CONFIG_SYS_HZ_CLOCK
16static inline u32 read_cntfrq(void)
17{
18 u32 frq;
19
20 asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (frq));
21 return frq;
22}
23#endif
24
Vitaly Andrianov0e902872014-04-04 13:16:49 -040025int timer_init(void)
26{
27 gd->arch.tbl = 0;
28 gd->arch.tbu = 0;
29
Patrick Delaunayb3c5a9f2018-03-20 11:41:23 +010030#ifdef CONFIG_SYS_HZ_CLOCK
Patrick Delaunayd502ee02018-03-12 10:46:06 +010031 gd->arch.timer_rate_hz = CONFIG_SYS_HZ_CLOCK;
Patrick Delaunayb3c5a9f2018-03-20 11:41:23 +010032#else
33 gd->arch.timer_rate_hz = read_cntfrq();
34#endif
Vitaly Andrianov0e902872014-04-04 13:16:49 -040035 return 0;
36}
37
38unsigned long long get_ticks(void)
39{
40 ulong nowl, nowu;
41
42 asm volatile("mrrc p15, 0, %0, %1, c14" : "=r" (nowl), "=r" (nowu));
43
44 gd->arch.tbl = nowl;
45 gd->arch.tbu = nowu;
46
47 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
48}
49
50
Patrick Delaunaycfab8482016-11-22 17:31:33 +010051ulong timer_get_boot_us(void)
52{
Patrick Delaunaye4dfef92019-04-18 17:32:46 +020053 if (!gd->arch.timer_rate_hz)
54 timer_init();
55
Patrick Delaunayb3c5a9f2018-03-20 11:41:23 +010056 return lldiv(get_ticks(), gd->arch.timer_rate_hz / 1000000);
Vitaly Andrianov0e902872014-04-04 13:16:49 -040057}
58
59ulong get_tbclk(void)
60{
61 return gd->arch.timer_rate_hz;
62}