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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Aneesh Bansalc4713ec2016-01-22 16:37:25 +05302/*
3 * Copyright 2015 Freescale Semiconductor, Inc.
Gaurav Jain119c7002022-06-23 16:31:35 +05304 * Copyright 2022 NXP
Aneesh Bansalc4713ec2016-01-22 16:37:25 +05305 */
6
7#include <common.h>
Simon Glass11c89f32017-05-17 17:18:03 -06008#include <dm.h>
Simon Glass5e6201b2019-08-01 09:46:51 -06009#include <env.h>
Ovidiu Panait7dbb0212022-01-01 19:13:29 +020010#include <init.h>
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053011#include <fsl_validate.h>
Sumit Gargf6d96cb2016-07-14 12:27:51 -040012#include <fsl_secboot_err.h>
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053013#include <fsl_sfp.h>
Simon Glass0f2af882020-05-10 11:40:05 -060014#include <log.h>
Sumit Gargf6d96cb2016-07-14 12:27:51 -040015#include <dm/root.h>
Tom Rinibf1dfd82022-06-17 16:24:34 -040016#include <asm/fsl_secure_boot.h>
Sumit Gargf6d96cb2016-07-14 12:27:51 -040017
Sumit Gargbdddd6e2016-06-14 13:52:38 -040018#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_FRAMEWORK)
19#include <spl.h>
20#endif
21
Sumit Gargf6d96cb2016-07-14 12:27:51 -040022#ifdef CONFIG_FSL_CORENET
23#include <asm/fsl_pamu.h>
24#endif
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053025
York Sunc4f047c2017-03-27 11:41:03 -070026#ifdef CONFIG_ARCH_LS1021A
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053027#include <asm/arch/immap_ls102xa.h>
28#endif
29
30#if defined(CONFIG_MPC85xx)
Tom Rinid5c3bf22022-10-28 20:27:12 -040031#define CONFIG_DCFG_ADDR CFG_SYS_MPC85xx_GUTS_ADDR
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053032#else
Tom Rini376b88a2022-10-28 20:27:13 -040033#define CONFIG_DCFG_ADDR CFG_SYS_FSL_GUTS_ADDR
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053034#endif
35
36#ifdef CONFIG_SYS_FSL_CCSR_GUR_LE
37#define gur_in32(a) in_le32(a)
38#else
39#define gur_in32(a) in_be32(a)
40#endif
41
42/* Check the Boot Mode. If Secure, return 1 else return 0 */
43int fsl_check_boot_mode_secure(void)
44{
45 uint32_t val;
Tom Rini6a5dccc2022-11-16 13:10:41 -050046 struct ccsr_sfp_regs *sfp_regs = (void *)(CFG_SYS_SFP_ADDR);
Aneesh Bansalc4713ec2016-01-22 16:37:25 +053047 struct ccsr_gur __iomem *gur = (void *)(CONFIG_DCFG_ADDR);
48
49 val = sfp_in32(&sfp_regs->ospr) & ITS_MASK;
50 if (val == ITS_MASK)
51 return 1;
52
53#if defined(CONFIG_FSL_CORENET) || !defined(CONFIG_MPC85xx)
54 /* For PBL based platforms check the SB_EN bit in RCWSR */
55 val = gur_in32(&gur->rcwsr[RCW_SB_EN_REG_INDEX - 1]) & RCW_SB_EN_MASK;
56 if (val == RCW_SB_EN_MASK)
57 return 1;
58#endif
59
60#if defined(CONFIG_MPC85xx) && !defined(CONFIG_FSL_CORENET)
61 /* For Non-PBL Platforms, check the Device Status register 2*/
62 val = gur_in32(&gur->pordevsr2) & MPC85xx_PORDEVSR2_SBC_MASK;
63 if (val != MPC85xx_PORDEVSR2_SBC_MASK)
64 return 1;
65
66#endif
67 return 0;
68}
Aneesh Bansal39d5b3b2016-01-22 16:37:26 +053069
Sumit Gargf6d96cb2016-07-14 12:27:51 -040070#ifndef CONFIG_SPL_BUILD
Aneesh Bansal39d5b3b2016-01-22 16:37:26 +053071int fsl_setenv_chain_of_trust(void)
72{
73 /* Check Boot Mode
74 * If Boot Mode is Non-Secure, no changes are required
75 */
76 if (fsl_check_boot_mode_secure() == 0)
77 return 0;
78
79 /* If Boot mode is Secure, set the environment variables
80 * bootdelay = 0 (To disable Boot Prompt)
Tom Rinibf1dfd82022-06-17 16:24:34 -040081 * bootcmd = CHAIN_BOOT_CMD (Validate and execute Boot script)
Aneesh Bansal39d5b3b2016-01-22 16:37:26 +053082 */
Udit Agarwal9bca6622019-06-11 09:37:49 +000083 env_set("bootdelay", "-2");
Sumit Garg9cbcc4d2017-06-05 23:51:51 +053084
85#ifdef CONFIG_ARM
Simon Glass6a38e412017-08-03 12:22:09 -060086 env_set("secureboot", "y");
Sumit Garg9cbcc4d2017-06-05 23:51:51 +053087#else
Tom Rinibf1dfd82022-06-17 16:24:34 -040088 env_set("bootcmd", CHAIN_BOOT_CMD);
Sumit Garg9cbcc4d2017-06-05 23:51:51 +053089#endif
90
Aneesh Bansal39d5b3b2016-01-22 16:37:26 +053091 return 0;
92}
Sumit Gargf6d96cb2016-07-14 12:27:51 -040093#endif
94
95#ifdef CONFIG_SPL_BUILD
96void spl_validate_uboot(uint32_t hdr_addr, uintptr_t img_addr)
97{
98 int res;
99
100 /*
101 * Check Boot Mode
102 * If Boot Mode is Non-Secure, skip validation
103 */
104 if (fsl_check_boot_mode_secure() == 0)
105 return;
106
107 printf("SPL: Validating U-Boot image\n");
108
109#ifdef CONFIG_ADDR_MAP
110 init_addr_map();
111#endif
112
113#ifdef CONFIG_FSL_CORENET
114 if (pamu_init() < 0)
115 fsl_secboot_handle_error(ERROR_ESBC_PAMU_INIT);
116#endif
117
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400118/*
119 * dm_init_and_scan() is called as part of common SPL framework, so no
120 * need to call it again but in case of powerpc platforms which currently
121 * do not use common SPL framework, so need to call this function here.
122 */
123#if defined(CONFIG_SPL_DM) && (!defined(CONFIG_SPL_FRAMEWORK))
Sumit Gargbdddd6e2016-06-14 13:52:38 -0400124 dm_init_and_scan(true);
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400125#endif
126 res = fsl_secboot_validate(hdr_addr, CONFIG_SPL_UBOOT_KEY_HASH,
127 &img_addr);
128
129 if (res == 0)
130 printf("SPL: Validation of U-boot successful\n");
131}
Sumit Gargbdddd6e2016-06-14 13:52:38 -0400132
133#ifdef CONFIG_SPL_FRAMEWORK
134/* Override weak funtion defined in SPL framework to enable validation
135 * of main u-boot image before jumping to u-boot image.
136 */
137void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
138{
139 typedef void __noreturn (*image_entry_noargs_t)(void);
140 uint32_t hdr_addr;
141
142 image_entry_noargs_t image_entry =
143 (image_entry_noargs_t)(unsigned long)spl_image->entry_point;
144
145 hdr_addr = (spl_image->entry_point + spl_image->size -
Tom Rinicb189262022-12-02 16:42:50 -0500146 FSL_U_BOOT_HDR_SIZE);
Sumit Gargbdddd6e2016-06-14 13:52:38 -0400147 spl_validate_uboot(hdr_addr, (uintptr_t)spl_image->entry_point);
148 /*
149 * In case of failure in validation, spl_validate_uboot would
150 * not return back in case of Production environment with ITS=1.
151 * Thus U-Boot will not start.
152 * In Development environment (ITS=0 and SB_EN=1), the function
153 * may return back in case of non-fatal failures.
154 */
155
Tom Rinif1c2fc02017-01-11 10:45:48 -0500156 debug("image entry point: 0x%lX\n", spl_image->entry_point);
Sumit Gargbdddd6e2016-06-14 13:52:38 -0400157 image_entry();
158}
159#endif /* ifdef CONFIG_SPL_FRAMEWORK */
Sumit Gargf6d96cb2016-07-14 12:27:51 -0400160#endif /* ifdef CONFIG_SPL_BUILD */