| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Nobuhiro Iwamatsu | 1b15ba6 | 2014-06-24 17:10:02 +0900 | [diff] [blame] | 2 | /* |
| 3 | * arch/arm/include/asm/arch-rmobile/r8a7794.h |
| 4 | * |
| 5 | * Copyright (C) 2014 Renesas Electronics Corporation |
| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 6 | */ |
| Nobuhiro Iwamatsu | 1b15ba6 | 2014-06-24 17:10:02 +0900 | [diff] [blame] | 7 | |
| 8 | #ifndef __ASM_ARCH_R8A7794_H |
| 9 | #define __ASM_ARCH_R8A7794_H |
| 10 | |
| 11 | #include "rcar-base.h" |
| 12 | |
| Nobuhiro Iwamatsu | dc2c4f0 | 2014-11-06 16:03:47 +0900 | [diff] [blame] | 13 | /* SH-I2C */ |
| 14 | #define CONFIG_SYS_I2C_SH_BASE2 0xE60B0000 |
| 15 | |
| Nobuhiro Iwamatsu | 5f4d280 | 2014-12-02 16:52:22 +0900 | [diff] [blame] | 16 | /* Module stop control/status register bits */ |
| 17 | #define MSTP0_BITS 0x00440801 |
| 18 | #define MSTP1_BITS 0x936899DA |
| 19 | #define MSTP2_BITS 0x100D21FC |
| 20 | #define MSTP3_BITS 0xE084D810 |
| 21 | #define MSTP4_BITS 0x800001C4 |
| 22 | #define MSTP5_BITS 0x40C00044 |
| 23 | #define MSTP7_BITS 0x013FE618 |
| 24 | #define MSTP8_BITS 0x40803C05 |
| 25 | #define MSTP9_BITS 0xFB879FEE |
| 26 | #define MSTP10_BITS 0xFFFEFFE0 |
| 27 | #define MSTP11_BITS 0x000001C0 |
| 28 | |
| Nobuhiro Iwamatsu | 3ec5f86 | 2014-12-17 08:03:00 +0900 | [diff] [blame] | 29 | /* SDHI */ |
| 30 | #define CONFIG_SYS_SH_SDHI1_BASE 0xEE140000 |
| 31 | #define CONFIG_SYS_SH_SDHI2_BASE 0xEE160000 |
| 32 | #define CONFIG_SYS_SH_SDHI_NR_CHANNEL 3 |
| 33 | |
| Nobuhiro Iwamatsu | f1ee163 | 2015-03-05 08:30:40 +0900 | [diff] [blame] | 34 | #define R8A7794_CUT_ES2 2 |
| 35 | #define IS_R8A7794_ES2() \ |
| 36 | (rmobile_get_cpu_rev_integer() == R8A7794_CUT_ES2) |
| 37 | |
| Nobuhiro Iwamatsu | 1b15ba6 | 2014-06-24 17:10:02 +0900 | [diff] [blame] | 38 | #endif /* __ASM_ARCH_R8A7794_H */ |