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Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02001/*
Codrin Ciubotariu681e0b22015-07-24 16:55:36 +03002 * Copyright 2014 - 2015 Freescale Semiconductor, Inc.
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02003 *
4 * SPDX-License-Identifier: GPL-2.0+
5 *
6 * Driver for the Vitesse VSC9953 L2 Switch
7 */
8
9#include <asm/io.h>
10#include <asm/fsl_serdes.h>
11#include <fm_eth.h>
Shaohui Xie835c72b2015-03-20 19:28:19 -070012#include <fsl_memac.h>
Codrin Ciubotariu43db9702015-07-24 16:55:26 +030013#include <bitfield.h>
Codrin Ciubotariue111c322015-07-24 16:52:45 +030014#include <errno.h>
15#include <malloc.h>
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020016#include <vsc9953.h>
Codrin Ciubotariu2f52a3f2015-07-24 16:55:28 +030017#include <ethsw.h>
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020018
19static struct vsc9953_info vsc9953_l2sw = {
20 .port[0] = VSC9953_PORT_INFO_INITIALIZER(0),
21 .port[1] = VSC9953_PORT_INFO_INITIALIZER(1),
22 .port[2] = VSC9953_PORT_INFO_INITIALIZER(2),
23 .port[3] = VSC9953_PORT_INFO_INITIALIZER(3),
24 .port[4] = VSC9953_PORT_INFO_INITIALIZER(4),
25 .port[5] = VSC9953_PORT_INFO_INITIALIZER(5),
26 .port[6] = VSC9953_PORT_INFO_INITIALIZER(6),
27 .port[7] = VSC9953_PORT_INFO_INITIALIZER(7),
28 .port[8] = VSC9953_PORT_INFO_INITIALIZER(8),
29 .port[9] = VSC9953_PORT_INFO_INITIALIZER(9),
30};
31
Codrin Ciubotariue111c322015-07-24 16:52:45 +030032void vsc9953_port_info_set_mdio(int port_no, struct mii_dev *bus)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020033{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030034 if (!VSC9953_PORT_CHECK(port_no))
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020035 return;
36
Codrin Ciubotariue111c322015-07-24 16:52:45 +030037 vsc9953_l2sw.port[port_no].bus = bus;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020038}
39
Codrin Ciubotariue111c322015-07-24 16:52:45 +030040void vsc9953_port_info_set_phy_address(int port_no, int address)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020041{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030042 if (!VSC9953_PORT_CHECK(port_no))
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020043 return;
44
Codrin Ciubotariue111c322015-07-24 16:52:45 +030045 vsc9953_l2sw.port[port_no].phyaddr = address;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020046}
47
Codrin Ciubotariue111c322015-07-24 16:52:45 +030048void vsc9953_port_info_set_phy_int(int port_no, phy_interface_t phy_int)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020049{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030050 if (!VSC9953_PORT_CHECK(port_no))
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020051 return;
52
Codrin Ciubotariue111c322015-07-24 16:52:45 +030053 vsc9953_l2sw.port[port_no].enet_if = phy_int;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020054}
55
Codrin Ciubotariue111c322015-07-24 16:52:45 +030056void vsc9953_port_enable(int port_no)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020057{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030058 if (!VSC9953_PORT_CHECK(port_no))
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020059 return;
60
Codrin Ciubotariue111c322015-07-24 16:52:45 +030061 vsc9953_l2sw.port[port_no].enabled = 1;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020062}
63
Codrin Ciubotariue111c322015-07-24 16:52:45 +030064void vsc9953_port_disable(int port_no)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020065{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030066 if (!VSC9953_PORT_CHECK(port_no))
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020067 return;
68
Codrin Ciubotariue111c322015-07-24 16:52:45 +030069 vsc9953_l2sw.port[port_no].enabled = 0;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020070}
71
72static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr,
73 int regnum, int value)
74{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030075 int timeout = 50000;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020076
77 out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
78 ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
79 (0x1 << 1));
80 asm("sync");
81
82 while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
83 udelay(1);
84
85 if (timeout == 0)
86 debug("Timeout waiting for MDIO write\n");
87}
88
89static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr,
90 int regnum)
91{
Codrin Ciubotariue111c322015-07-24 16:52:45 +030092 int value = 0xFFFF;
93 int timeout = 50000;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +020094
95 while ((in_le32(&phyregs->miimstatus) & MIIMIND_OPR_PEND) && --timeout)
96 udelay(1);
97 if (timeout == 0) {
98 debug("Timeout waiting for MDIO operation to finish\n");
99 return value;
100 }
101
102 /* Put the address of the phy, and the register
103 * number into MIICMD
104 */
105 out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
106 ((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
107 (0x2 << 1));
108
109 timeout = 50000;
110 /* Wait for the the indication that the read is done */
111 while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
112 udelay(1);
113 if (timeout == 0)
114 debug("Timeout waiting for MDIO read\n");
115
116 /* Grab the value read from the PHY */
117 value = in_le32(&phyregs->miimdata);
118
119 if ((value & 0x00030000) == 0)
120 return value & 0x0000ffff;
121
122 return value;
123}
124
125static int init_phy(struct eth_device *dev)
126{
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300127 struct vsc9953_port_info *l2sw_port = dev->priv;
128 struct phy_device *phydev = NULL;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200129
130#ifdef CONFIG_PHYLIB
131 if (!l2sw_port->bus)
132 return 0;
133 phydev = phy_connect(l2sw_port->bus, l2sw_port->phyaddr, dev,
134 l2sw_port->enet_if);
135 if (!phydev) {
136 printf("Failed to connect\n");
137 return -1;
138 }
139
140 phydev->supported &= SUPPORTED_10baseT_Half |
141 SUPPORTED_10baseT_Full |
142 SUPPORTED_100baseT_Half |
143 SUPPORTED_100baseT_Full |
144 SUPPORTED_1000baseT_Full;
145 phydev->advertising = phydev->supported;
146
147 l2sw_port->phydev = phydev;
148
149 phy_config(phydev);
150#endif
151
152 return 0;
153}
154
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300155static int vsc9953_port_init(int port_no)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200156{
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300157 struct eth_device *dev;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200158
159 /* Internal ports never have a PHY */
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300160 if (VSC9953_INTERNAL_PORT_CHECK(port_no))
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200161 return 0;
162
163 /* alloc eth device */
164 dev = (struct eth_device *)calloc(1, sizeof(struct eth_device));
165 if (!dev)
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300166 return -ENOMEM;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200167
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300168 sprintf(dev->name, "SW@PORT%d", port_no);
169 dev->priv = &vsc9953_l2sw.port[port_no];
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200170 dev->init = NULL;
171 dev->halt = NULL;
172 dev->send = NULL;
173 dev->recv = NULL;
174
175 if (init_phy(dev)) {
176 free(dev);
Codrin Ciubotariue111c322015-07-24 16:52:45 +0300177 return -ENODEV;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +0200178 }
179
180 return 0;
181}
182
Codrin Ciubotariu43db9702015-07-24 16:55:26 +0300183static int vsc9953_vlan_table_poll_idle(void)
184{
185 struct vsc9953_analyzer *l2ana_reg;
186 int timeout;
187
188 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
189 VSC9953_ANA_OFFSET);
190
191 timeout = 50000;
192 while (((in_le32(&l2ana_reg->ana_tables.vlan_access) &
193 VSC9953_VLAN_CMD_MASK) != VSC9953_VLAN_CMD_IDLE) && --timeout)
194 udelay(1);
195
196 return timeout ? 0 : -EBUSY;
197}
198
Codrin Ciubotariu4718f952015-07-24 16:55:33 +0300199#ifdef CONFIG_CMD_ETHSW
200/* Add/remove a port to/from a VLAN */
201static void vsc9953_vlan_table_membership_set(int vid, u32 port_no, u8 add)
202{
203 u32 val;
204 struct vsc9953_analyzer *l2ana_reg;
205
206 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
207 VSC9953_ANA_OFFSET);
208
209 if (vsc9953_vlan_table_poll_idle() < 0) {
210 debug("VLAN table timeout\n");
211 return;
212 }
213
214 val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
215 val = bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid);
216 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val);
217
218 clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
219 VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ);
220
221 if (vsc9953_vlan_table_poll_idle() < 0) {
222 debug("VLAN table timeout\n");
223 return;
224 }
225
226 val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
227 val = bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid);
228 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val);
229
230 val = in_le32(&l2ana_reg->ana_tables.vlan_access);
231 if (!add) {
232 val = bitfield_replace_by_mask(val, VSC9953_VLAN_CMD_MASK,
233 VSC9953_VLAN_CMD_WRITE) &
234 ~(bitfield_replace_by_mask(0, VSC9953_VLAN_PORT_MASK,
235 (1 << port_no)));
236 ;
237 } else {
238 val = bitfield_replace_by_mask(val, VSC9953_VLAN_CMD_MASK,
239 VSC9953_VLAN_CMD_WRITE) |
240 bitfield_replace_by_mask(0, VSC9953_VLAN_PORT_MASK,
241 (1 << port_no));
242 }
243 out_le32(&l2ana_reg->ana_tables.vlan_access, val);
244
245 /* wait for VLAN table command to flush */
246 if (vsc9953_vlan_table_poll_idle() < 0) {
247 debug("VLAN table timeout\n");
248 return;
249 }
250}
251
252/* show VLAN membership for a port */
253static void vsc9953_vlan_membership_show(int port_no)
254{
255 u32 val;
256 struct vsc9953_analyzer *l2ana_reg;
257 u32 vid;
258
259 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
260 VSC9953_ANA_OFFSET);
261
262 printf("Port %d VLAN membership: ", port_no);
263
264 for (vid = 0; vid < VSC9953_MAX_VLAN; vid++) {
265 if (vsc9953_vlan_table_poll_idle() < 0) {
266 debug("VLAN table timeout\n");
267 return;
268 }
269
270 val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
271 val = bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK,
272 vid);
273 out_le32(&l2ana_reg->ana_tables.vlan_tidx, val);
274
275 clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
276 VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ);
277
278 if (vsc9953_vlan_table_poll_idle() < 0) {
279 debug("VLAN table timeout\n");
280 return;
281 }
282
283 val = in_le32(&l2ana_reg->ana_tables.vlan_access);
284
285 if (bitfield_extract_by_mask(val, VSC9953_VLAN_PORT_MASK) &
286 (1 << port_no))
287 printf("%d ", vid);
288 }
289 printf("\n");
290}
291#endif
292
Codrin Ciubotariu43db9702015-07-24 16:55:26 +0300293/* vlan table set/clear all membership of vid */
294static void vsc9953_vlan_table_membership_all_set(int vid, int set_member)
295{
296 uint val;
297 struct vsc9953_analyzer *l2ana_reg;
298
299 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
300 VSC9953_ANA_OFFSET);
301
302 if (vsc9953_vlan_table_poll_idle() < 0) {
303 debug("VLAN table timeout\n");
304 return;
305 }
306
307 /* read current vlan configuration */
308 val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
309 out_le32(&l2ana_reg->ana_tables.vlan_tidx,
310 bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
311
312 clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
313 VSC9953_VLAN_CMD_MASK, VSC9953_VLAN_CMD_READ);
314
315 if (vsc9953_vlan_table_poll_idle() < 0) {
316 debug("VLAN table timeout\n");
317 return;
318 }
319
320 val = in_le32(&l2ana_reg->ana_tables.vlan_tidx);
321 out_le32(&l2ana_reg->ana_tables.vlan_tidx,
322 bitfield_replace_by_mask(val, VSC9953_ANA_TBL_VID_MASK, vid));
323
324 clrsetbits_le32(&l2ana_reg->ana_tables.vlan_access,
325 VSC9953_VLAN_PORT_MASK | VSC9953_VLAN_CMD_MASK,
326 VSC9953_VLAN_CMD_WRITE |
327 (set_member ? VSC9953_VLAN_PORT_MASK : 0));
328}
Codrin Ciubotariu4718f952015-07-24 16:55:33 +0300329
330#ifdef CONFIG_CMD_ETHSW
331/* Get PVID of a VSC9953 port */
332static int vsc9953_port_vlan_pvid_get(int port_nr, int *pvid)
333{
334 u32 val;
335 struct vsc9953_analyzer *l2ana_reg;
336
337 /* Administrative down */
338 if (vsc9953_l2sw.port[port_nr].enabled) {
339 printf("Port %d is administrative down\n", port_nr);
340 return -1;
341 }
342
343 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
344 VSC9953_ANA_OFFSET);
345
346 /* Get ingress PVID */
347 val = in_le32(&l2ana_reg->port[port_nr].vlan_cfg);
348 *pvid = bitfield_extract_by_mask(val, VSC9953_VLAN_CFG_VID_MASK);
349
350 return 0;
351}
352#endif
Codrin Ciubotariu43db9702015-07-24 16:55:26 +0300353
354/* Set PVID for a VSC9953 port */
355static void vsc9953_port_vlan_pvid_set(int port_no, int pvid)
356{
357 uint val;
358 struct vsc9953_analyzer *l2ana_reg;
359 struct vsc9953_rew_reg *l2rew_reg;
360
361 /* Administrative down */
362 if (!vsc9953_l2sw.port[port_no].enabled) {
363 printf("Port %d is administrative down\n", port_no);
364 return;
365 }
366
367 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
368 VSC9953_ANA_OFFSET);
369 l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
370 VSC9953_REW_OFFSET);
371
372 /* Set PVID on ingress */
373 val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
374 val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_VID_MASK, pvid);
375 out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
376
377 /* Set PVID on egress */
378 val = in_le32(&l2rew_reg->port[port_no].port_vlan_cfg);
379 val = bitfield_replace_by_mask(val, VSC9953_PORT_VLAN_CFG_VID_MASK,
380 pvid);
381 out_le32(&l2rew_reg->port[port_no].port_vlan_cfg, val);
382}
383
384static void vsc9953_port_all_vlan_pvid_set(int pvid)
385{
386 int i;
387
388 for (i = 0; i < VSC9953_MAX_PORTS; i++)
389 vsc9953_port_vlan_pvid_set(i, pvid);
390}
391
392/* Enable/disable vlan aware of a VSC9953 port */
393static void vsc9953_port_vlan_aware_set(int port_no, int enabled)
394{
395 struct vsc9953_analyzer *l2ana_reg;
396
397 /* Administrative down */
398 if (!vsc9953_l2sw.port[port_no].enabled) {
399 printf("Port %d is administrative down\n", port_no);
400 return;
401 }
402
403 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
404 VSC9953_ANA_OFFSET);
405
406 if (enabled)
407 setbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
408 VSC9953_VLAN_CFG_AWARE_ENA);
409 else
410 clrbits_le32(&l2ana_reg->port[port_no].vlan_cfg,
411 VSC9953_VLAN_CFG_AWARE_ENA);
412}
413
414/* Set all VSC9953 ports' vlan aware */
415static void vsc9953_port_all_vlan_aware_set(int enabled)
416{
417 int i;
418
419 for (i = 0; i < VSC9953_MAX_PORTS; i++)
420 vsc9953_port_vlan_aware_set(i, enabled);
421}
422
423/* Enable/disable vlan pop count of a VSC9953 port */
424static void vsc9953_port_vlan_popcnt_set(int port_no, int popcnt)
425{
426 uint val;
427 struct vsc9953_analyzer *l2ana_reg;
428
429 /* Administrative down */
430 if (!vsc9953_l2sw.port[port_no].enabled) {
431 printf("Port %d is administrative down\n", port_no);
432 return;
433 }
434
435 if (popcnt > 3 || popcnt < 0) {
436 printf("Invalid pop count value: %d\n", port_no);
437 return;
438 }
439
440 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
441 VSC9953_ANA_OFFSET);
442
443 val = in_le32(&l2ana_reg->port[port_no].vlan_cfg);
444 val = bitfield_replace_by_mask(val, VSC9953_VLAN_CFG_POP_CNT_MASK,
445 popcnt);
446 out_le32(&l2ana_reg->port[port_no].vlan_cfg, val);
447}
448
449/* Set all VSC9953 ports' pop count */
450static void vsc9953_port_all_vlan_poncnt_set(int popcnt)
451{
452 int i;
453
454 for (i = 0; i < VSC9953_MAX_PORTS; i++)
455 vsc9953_port_vlan_popcnt_set(i, popcnt);
456}
457
458/* Enable/disable learning for frames dropped due to ingress filtering */
459static void vsc9953_vlan_ingr_fltr_learn_drop(int enable)
460{
461 struct vsc9953_analyzer *l2ana_reg;
462
463 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
464 VSC9953_ANA_OFFSET);
465
466 if (enable)
467 setbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
468 else
469 clrbits_le32(&l2ana_reg->ana.adv_learn, VSC9953_VLAN_CHK);
470}
471
472/* Egress untag modes of a VSC9953 port */
473enum egress_untag_mode {
474 EGRESS_UNTAG_ALL = 0,
475 EGRESS_UNTAG_PVID_AND_ZERO,
476 EGRESS_UNTAG_ZERO,
477 EGRESS_UNTAG_NONE,
478};
479
Codrin Ciubotariu4718f952015-07-24 16:55:33 +0300480#ifdef CONFIG_CMD_ETHSW
481/* Get egress tagging configuration for a VSC9953 port */
482static int vsc9953_port_vlan_egr_untag_get(int port_no,
483 enum egress_untag_mode *mode)
484{
485 u32 val;
486 struct vsc9953_rew_reg *l2rew_reg;
487
488 /* Administrative down */
489 if (!vsc9953_l2sw.port[port_no].enabled) {
490 printf("Port %d is administrative down\n", port_no);
491 return -1;
492 }
493
494 l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
495 VSC9953_REW_OFFSET);
496
497 val = in_le32(&l2rew_reg->port[port_no].port_tag_cfg);
498
499 switch (val & VSC9953_TAG_CFG_MASK) {
500 case VSC9953_TAG_CFG_NONE:
501 *mode = EGRESS_UNTAG_ALL;
502 return 0;
503 case VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO:
504 *mode = EGRESS_UNTAG_PVID_AND_ZERO;
505 return 0;
506 case VSC9953_TAG_CFG_ALL_BUT_ZERO:
507 *mode = EGRESS_UNTAG_ZERO;
508 return 0;
509 case VSC9953_TAG_CFG_ALL:
510 *mode = EGRESS_UNTAG_NONE;
511 return 0;
512 default:
513 printf("Unknown egress tagging configuration for port %d\n",
514 port_no);
515 return -1;
516 }
517}
518
519/* Show egress tagging configuration for a VSC9953 port */
520static void vsc9953_port_vlan_egr_untag_show(int port_no)
521{
522 enum egress_untag_mode mode;
523
524 if (vsc9953_port_vlan_egr_untag_get(port_no, &mode)) {
525 printf("%7d\t%17s\n", port_no, "-");
526 return;
527 }
528
529 printf("%7d\t", port_no);
530 switch (mode) {
531 case EGRESS_UNTAG_ALL:
532 printf("%17s\n", "all");
533 break;
534 case EGRESS_UNTAG_NONE:
535 printf("%17s\n", "none");
536 break;
537 case EGRESS_UNTAG_PVID_AND_ZERO:
538 printf("%17s\n", "PVID and 0");
539 break;
540 case EGRESS_UNTAG_ZERO:
541 printf("%17s\n", "0");
542 break;
543 default:
544 printf("%17s\n", "-");
545 }
546}
547#endif
548
Codrin Ciubotariu43db9702015-07-24 16:55:26 +0300549static void vsc9953_port_vlan_egr_untag_set(int port_no,
550 enum egress_untag_mode mode)
551{
552 struct vsc9953_rew_reg *l2rew_reg;
553
554 /* Administrative down */
555 if (!vsc9953_l2sw.port[port_no].enabled) {
556 printf("Port %d is administrative down\n", port_no);
557 return;
558 }
559
560 l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
561 VSC9953_REW_OFFSET);
562
563 switch (mode) {
564 case EGRESS_UNTAG_ALL:
565 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
566 VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_NONE);
567 break;
568 case EGRESS_UNTAG_PVID_AND_ZERO:
569 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
570 VSC9953_TAG_CFG_MASK,
571 VSC9953_TAG_CFG_ALL_BUT_PVID_ZERO);
572 break;
573 case EGRESS_UNTAG_ZERO:
574 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
575 VSC9953_TAG_CFG_MASK,
576 VSC9953_TAG_CFG_ALL_BUT_ZERO);
577 break;
578 case EGRESS_UNTAG_NONE:
579 clrsetbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
580 VSC9953_TAG_CFG_MASK, VSC9953_TAG_CFG_ALL);
581 break;
582 default:
583 printf("Unknown untag mode for port %d\n", port_no);
584 }
585}
586
587static void vsc9953_port_all_vlan_egress_untagged_set(
588 enum egress_untag_mode mode)
589{
590 int i;
591
592 for (i = 0; i < VSC9953_MAX_PORTS; i++)
593 vsc9953_port_vlan_egr_untag_set(i, mode);
594}
595
Codrin Ciubotariu2f52a3f2015-07-24 16:55:28 +0300596#ifdef CONFIG_CMD_ETHSW
597
598/* Enable/disable status of a VSC9953 port */
599static void vsc9953_port_status_set(int port_no, u8 enabled)
600{
601 struct vsc9953_qsys_reg *l2qsys_reg;
602
603 /* Administrative down */
604 if (!vsc9953_l2sw.port[port_no].enabled)
605 return;
606
607 l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
608 VSC9953_QSYS_OFFSET);
609
610 if (enabled)
611 setbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no],
612 VSC9953_PORT_ENA);
613 else
614 clrbits_le32(&l2qsys_reg->sys.switch_port_mode[port_no],
615 VSC9953_PORT_ENA);
616}
617
618/* Start autonegotiation for a VSC9953 PHY */
619static void vsc9953_phy_autoneg(int port_no)
620{
621 if (!vsc9953_l2sw.port[port_no].phydev)
622 return;
623
624 if (vsc9953_l2sw.port[port_no].phydev->drv->startup(
625 vsc9953_l2sw.port[port_no].phydev))
626 printf("Failed to start PHY for port %d\n", port_no);
627}
628
629/* Print a VSC9953 port's configuration */
630static void vsc9953_port_config_show(int port_no)
631{
632 int speed;
633 int duplex;
634 int link;
635 u8 enabled;
636 u32 val;
637 struct vsc9953_qsys_reg *l2qsys_reg;
638
639 l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
640 VSC9953_QSYS_OFFSET);
641
642 val = in_le32(&l2qsys_reg->sys.switch_port_mode[port_no]);
643 enabled = vsc9953_l2sw.port[port_no].enabled &&
644 (val & VSC9953_PORT_ENA);
645
646 /* internal ports (8 and 9) are fixed */
647 if (VSC9953_INTERNAL_PORT_CHECK(port_no)) {
648 link = 1;
649 speed = SPEED_2500;
650 duplex = DUPLEX_FULL;
651 } else {
652 if (vsc9953_l2sw.port[port_no].phydev) {
653 link = vsc9953_l2sw.port[port_no].phydev->link;
654 speed = vsc9953_l2sw.port[port_no].phydev->speed;
655 duplex = vsc9953_l2sw.port[port_no].phydev->duplex;
656 } else {
657 link = -1;
658 speed = -1;
659 duplex = -1;
660 }
661 }
662
663 printf("%8d ", port_no);
664 printf("%8s ", enabled == 1 ? "enabled" : "disabled");
665 printf("%8s ", link == 1 ? "up" : "down");
666
667 switch (speed) {
668 case SPEED_10:
669 printf("%8d ", 10);
670 break;
671 case SPEED_100:
672 printf("%8d ", 100);
673 break;
674 case SPEED_1000:
675 printf("%8d ", 1000);
676 break;
677 case SPEED_2500:
678 printf("%8d ", 2500);
679 break;
680 case SPEED_10000:
681 printf("%8d ", 10000);
682 break;
683 default:
684 printf("%8s ", "-");
685 }
686
687 printf("%8s\n", duplex == DUPLEX_FULL ? "full" : "half");
688}
689
Codrin Ciubotariuc0034732015-07-24 16:55:29 +0300690/* Show VSC9953 ports' statistics */
691static void vsc9953_port_statistics_show(int port_no)
692{
693 u32 rx_val;
694 u32 tx_val;
695 struct vsc9953_system_reg *l2sys_reg;
696
697 /* Administrative down */
698 if (!vsc9953_l2sw.port[port_no].enabled) {
699 printf("Port %d is administrative down\n", port_no);
700 return;
701 }
702
703 l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
704 VSC9953_SYS_OFFSET);
705
706 printf("Statistics for L2 Switch port %d:\n", port_no);
707
708 /* Set counter view for our port */
709 out_le32(&l2sys_reg->sys.stat_cfg, port_no);
710
711#define VSC9953_STATS_PRINTF "%-15s %10u"
712
713 /* Get number of Rx and Tx frames */
714 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_short) +
715 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_frag) +
716 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_jabber) +
717 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_long) +
718 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_64) +
719 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_65_127) +
720 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_128_255) +
721 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_256_511) +
722 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_512_1023) +
723 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_1024_1526) +
724 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_jumbo);
725 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64) +
726 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127) +
727 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255) +
728 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511) +
729 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023) +
730 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526) +
731 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo);
732 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
733 "Rx frames:", rx_val, "Tx frames:", tx_val);
734
735 /* Get number of Rx and Tx bytes */
736 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_oct);
737 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_oct);
738 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
739 "Rx bytes:", rx_val, "Tx bytes:", tx_val);
740
741 /* Get number of Rx frames received ok and Tx frames sent ok */
742 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_0) +
743 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_1) +
744 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_2) +
745 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_3) +
746 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_4) +
747 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_5) +
748 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_6) +
749 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_yellow_prio_7) +
750 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_0) +
751 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_1) +
752 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_2) +
753 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_3) +
754 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_4) +
755 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_5) +
756 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_6) +
757 in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_green_prio_7);
758 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64) +
759 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127) +
760 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255) +
761 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511) +
762 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023) +
763 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526) +
764 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo);
765 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
766 "Rx frames ok:", rx_val, "Tx frames ok:", tx_val);
767
768 /* Get number of Rx and Tx unicast frames */
769 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_uc);
770 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_uc);
771 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
772 "Rx unicast:", rx_val, "Tx unicast:", tx_val);
773
774 /* Get number of Rx and Tx broadcast frames */
775 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_bc);
776 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_bc);
777 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
778 "Rx broadcast:", rx_val, "Tx broadcast:", tx_val);
779
780 /* Get number of Rx and Tx frames of 64B */
781 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_64);
782 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_64);
783 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
784 "Rx 64B:", rx_val, "Tx 64B:", tx_val);
785
786 /* Get number of Rx and Tx frames with sizes between 65B and 127B */
787 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_65_127);
788 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_65_127);
789 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
790 "Rx 65B-127B:", rx_val, "Tx 65B-127B:", tx_val);
791
792 /* Get number of Rx and Tx frames with sizes between 128B and 255B */
793 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_128_255);
794 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_128_255);
795 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
796 "Rx 128B-255B:", rx_val, "Tx 128B-255B:", tx_val);
797
798 /* Get number of Rx and Tx frames with sizes between 256B and 511B */
799 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_256_511);
800 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_256_511);
801 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
802 "Rx 256B-511B:", rx_val, "Tx 256B-511B:", tx_val);
803
804 /* Get number of Rx and Tx frames with sizes between 512B and 1023B */
805 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_512_1023);
806 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_512_1023);
807 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
808 "Rx 512B-1023B:", rx_val, "Tx 512B-1023B:", tx_val);
809
810 /* Get number of Rx and Tx frames with sizes between 1024B and 1526B */
811 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_1024_1526);
812 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_1024_1526);
813 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
814 "Rx 1024B-1526B:", rx_val, "Tx 1024B-1526B:", tx_val);
815
816 /* Get number of Rx and Tx jumbo frames */
817 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_sz_jumbo);
818 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_sz_jumbo);
819 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
820 "Rx jumbo:", rx_val, "Tx jumbo:", tx_val);
821
822 /* Get number of Rx and Tx dropped frames */
823 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_cat_drop) +
824 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_tail) +
825 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_0) +
826 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_1) +
827 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_2) +
828 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_3) +
829 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_4) +
830 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_5) +
831 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_6) +
832 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_yellow_prio_7) +
833 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_0) +
834 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_1) +
835 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_2) +
836 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_3) +
837 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_4) +
838 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_5) +
839 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_6) +
840 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_green_prio_7);
841 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_drop) +
842 in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_aged);
843 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
844 "Rx drops:", rx_val, "Tx drops:", tx_val);
845
846 /*
847 * Get number of Rx frames with CRC or alignment errors
848 * and number of detected Tx collisions
849 */
850 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_crc);
851 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_col);
852 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
853 "Rx CRC&align:", rx_val, "Tx coll:", tx_val);
854
855 /*
856 * Get number of Rx undersized frames and
857 * number of Tx aged frames
858 */
859 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_short);
860 tx_val = in_le32(&l2sys_reg->stat.tx_cntrs.c_tx_aged);
861 printf(VSC9953_STATS_PRINTF"\t\t"VSC9953_STATS_PRINTF"\n",
862 "Rx undersize:", rx_val, "Tx aged:", tx_val);
863
864 /* Get number of Rx oversized frames */
865 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_long);
866 printf(VSC9953_STATS_PRINTF"\n", "Rx oversized:", rx_val);
867
868 /* Get number of Rx fragmented frames */
869 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_frag);
870 printf(VSC9953_STATS_PRINTF"\n", "Rx fragments:", rx_val);
871
872 /* Get number of Rx jabber errors */
873 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_jabber);
874 printf(VSC9953_STATS_PRINTF"\n", "Rx jabbers:", rx_val);
875
876 /*
877 * Get number of Rx frames filtered due to classification rules or
878 * no destination ports
879 */
880 rx_val = in_le32(&l2sys_reg->stat.rx_cntrs.c_rx_cat_drop) +
881 in_le32(&l2sys_reg->stat.drop_cntrs.c_dr_local);
882 printf(VSC9953_STATS_PRINTF"\n", "Rx filtered:", rx_val);
883
884 printf("\n");
885}
886
887/* Clear statistics for a VSC9953 port */
888static void vsc9953_port_statistics_clear(int port_no)
889{
890 struct vsc9953_system_reg *l2sys_reg;
891
892 /* Administrative down */
893 if (!vsc9953_l2sw.port[port_no].enabled) {
894 printf("Port %d is administrative down\n", port_no);
895 return;
896 }
897
898 l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
899 VSC9953_SYS_OFFSET);
900
901 /* Clear all counter groups for our ports */
902 out_le32(&l2sys_reg->sys.stat_cfg, port_no |
903 VSC9953_STAT_CLEAR_RX | VSC9953_STAT_CLEAR_TX |
904 VSC9953_STAT_CLEAR_DR);
905}
906
Codrin Ciubotariu2d1607f2015-07-24 16:55:30 +0300907enum port_learn_mode {
908 PORT_LEARN_NONE,
909 PORT_LEARN_AUTO
910};
911
912/* Set learning configuration for a VSC9953 port */
913static void vsc9953_port_learn_mode_set(int port_no, enum port_learn_mode mode)
914{
915 struct vsc9953_analyzer *l2ana_reg;
916
917 /* Administrative down */
918 if (!vsc9953_l2sw.port[port_no].enabled) {
919 printf("Port %d is administrative down\n", port_no);
920 return;
921 }
922
923 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
924 VSC9953_ANA_OFFSET);
925
926 switch (mode) {
927 case PORT_LEARN_NONE:
928 clrbits_le32(&l2ana_reg->port[port_no].port_cfg,
929 VSC9953_PORT_CFG_LEARN_DROP |
930 VSC9953_PORT_CFG_LEARN_CPU |
931 VSC9953_PORT_CFG_LEARN_AUTO |
932 VSC9953_PORT_CFG_LEARN_ENA);
933 break;
934 case PORT_LEARN_AUTO:
935 clrsetbits_le32(&l2ana_reg->port[port_no].port_cfg,
936 VSC9953_PORT_CFG_LEARN_DROP |
937 VSC9953_PORT_CFG_LEARN_CPU,
938 VSC9953_PORT_CFG_LEARN_ENA |
939 VSC9953_PORT_CFG_LEARN_AUTO);
940 break;
941 default:
942 printf("Unknown learn mode for port %d\n", port_no);
943 }
944}
945
946/* Get learning configuration for a VSC9953 port */
947static int vsc9953_port_learn_mode_get(int port_no, enum port_learn_mode *mode)
948{
949 u32 val;
950 struct vsc9953_analyzer *l2ana_reg;
951
952 /* Administrative down */
953 if (!vsc9953_l2sw.port[port_no].enabled) {
954 printf("Port %d is administrative down\n", port_no);
955 return -1;
956 }
957
958 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
959 VSC9953_ANA_OFFSET);
960
961 /* For now we only support HW learning (auto) and no learning */
962 val = in_le32(&l2ana_reg->port[port_no].port_cfg);
963 if ((val & (VSC9953_PORT_CFG_LEARN_ENA |
964 VSC9953_PORT_CFG_LEARN_AUTO)) ==
965 (VSC9953_PORT_CFG_LEARN_ENA | VSC9953_PORT_CFG_LEARN_AUTO))
966 *mode = PORT_LEARN_AUTO;
967 else
968 *mode = PORT_LEARN_NONE;
969
970 return 0;
971}
972
Codrin Ciubotariu4732e352015-09-09 18:00:52 +0300973/* wait for FDB to become available */
974static int vsc9953_mac_table_poll_idle(void)
975{
976 struct vsc9953_analyzer *l2ana_reg;
977 u32 timeout;
978
979 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
980 VSC9953_ANA_OFFSET);
981
982 timeout = 50000;
983 while (((in_le32(&l2ana_reg->ana_tables.mac_access) &
984 VSC9953_MAC_CMD_MASK) !=
985 VSC9953_MAC_CMD_IDLE) && --timeout)
986 udelay(1);
987
988 return timeout ? 0 : -EBUSY;
989}
990
991/* enum describing available commands for the MAC table */
992enum mac_table_cmd {
993 MAC_TABLE_READ,
994 MAC_TABLE_LOOKUP,
995 MAC_TABLE_WRITE,
996 MAC_TABLE_LEARN,
997 MAC_TABLE_FORGET,
998 MAC_TABLE_GET_NEXT,
999 MAC_TABLE_AGE,
1000};
1001
1002/* Issues a command to the FDB table */
1003static int vsc9953_mac_table_cmd(enum mac_table_cmd cmd)
1004{
1005 struct vsc9953_analyzer *l2ana_reg;
1006
1007 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1008 VSC9953_ANA_OFFSET);
1009
1010 switch (cmd) {
1011 case MAC_TABLE_READ:
1012 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1013 VSC9953_MAC_CMD_MASK | VSC9953_MAC_CMD_VALID,
1014 VSC9953_MAC_CMD_READ);
1015 break;
1016 case MAC_TABLE_LOOKUP:
1017 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1018 VSC9953_MAC_CMD_MASK, VSC9953_MAC_CMD_READ |
1019 VSC9953_MAC_CMD_VALID);
1020 break;
1021 case MAC_TABLE_WRITE:
1022 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1023 VSC9953_MAC_CMD_MASK |
1024 VSC9953_MAC_ENTRYTYPE_MASK,
1025 VSC9953_MAC_CMD_WRITE |
1026 VSC9953_MAC_ENTRYTYPE_LOCKED);
1027 break;
1028 case MAC_TABLE_LEARN:
1029 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1030 VSC9953_MAC_CMD_MASK |
1031 VSC9953_MAC_ENTRYTYPE_MASK,
1032 VSC9953_MAC_CMD_LEARN |
1033 VSC9953_MAC_ENTRYTYPE_LOCKED |
1034 VSC9953_MAC_CMD_VALID);
1035 break;
1036 case MAC_TABLE_FORGET:
1037 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1038 VSC9953_MAC_CMD_MASK |
1039 VSC9953_MAC_ENTRYTYPE_MASK,
1040 VSC9953_MAC_CMD_FORGET);
1041 break;
1042 case MAC_TABLE_GET_NEXT:
1043 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1044 VSC9953_MAC_CMD_MASK |
1045 VSC9953_MAC_ENTRYTYPE_MASK,
1046 VSC9953_MAC_CMD_NEXT);
1047 break;
1048 case MAC_TABLE_AGE:
1049 clrsetbits_le32(&l2ana_reg->ana_tables.mac_access,
1050 VSC9953_MAC_CMD_MASK |
1051 VSC9953_MAC_ENTRYTYPE_MASK,
1052 VSC9953_MAC_CMD_AGE);
1053 break;
1054 default:
1055 printf("Unknown MAC table command\n");
1056 }
1057
1058 if (vsc9953_mac_table_poll_idle() < 0) {
1059 debug("MAC table timeout\n");
1060 return -1;
1061 }
1062
1063 return 0;
1064}
1065
1066/* show the FDB entries that correspond to a port and a VLAN */
1067static void vsc9953_mac_table_show(int port_no, int vid)
1068{
1069 int rc[VSC9953_MAX_PORTS];
1070 enum port_learn_mode mode[VSC9953_MAX_PORTS];
1071 int i;
1072 u32 val;
1073 u32 vlan;
1074 u32 mach;
1075 u32 macl;
1076 u32 dest_indx;
1077 struct vsc9953_analyzer *l2ana_reg;
1078
1079 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1080 VSC9953_ANA_OFFSET);
1081
1082 /* disable auto learning */
1083 if (port_no == ETHSW_CMD_PORT_ALL) {
1084 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1085 rc[i] = vsc9953_port_learn_mode_get(i, &mode[i]);
1086 if (!rc[i] && mode[i] != PORT_LEARN_NONE)
1087 vsc9953_port_learn_mode_set(i, PORT_LEARN_NONE);
1088 }
1089 } else {
1090 rc[port_no] = vsc9953_port_learn_mode_get(port_no,
1091 &mode[port_no]);
1092 if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE)
1093 vsc9953_port_learn_mode_set(port_no, PORT_LEARN_NONE);
1094 }
1095
1096 /* write port and vid to get selected FDB entries */
1097 val = in_le32(&l2ana_reg->ana.anag_efil);
1098 if (port_no != ETHSW_CMD_PORT_ALL) {
1099 val = bitfield_replace_by_mask(val, VSC9953_AGE_PORT_MASK,
1100 port_no) | VSC9953_AGE_PORT_EN;
1101 }
1102 if (vid != ETHSW_CMD_VLAN_ALL) {
1103 val = bitfield_replace_by_mask(val, VSC9953_AGE_VID_MASK,
1104 vid) | VSC9953_AGE_VID_EN;
1105 }
1106 out_le32(&l2ana_reg->ana.anag_efil, val);
1107
1108 /* set MAC and VLAN to 0 to look from beginning */
1109 clrbits_le32(&l2ana_reg->ana_tables.mach_data,
1110 VSC9953_MAC_VID_MASK | VSC9953_MAC_MACH_MASK);
1111 out_le32(&l2ana_reg->ana_tables.macl_data, 0);
1112
1113 /* get entries */
1114 printf("%10s %17s %5s %4s\n", "EntryType", "MAC", "PORT", "VID");
1115 do {
1116 if (vsc9953_mac_table_cmd(MAC_TABLE_GET_NEXT) < 0) {
1117 debug("GET NEXT MAC table command failed\n");
1118 break;
1119 }
1120
1121 val = in_le32(&l2ana_reg->ana_tables.mac_access);
1122
1123 /* get out when an invalid entry is found */
1124 if (!(val & VSC9953_MAC_CMD_VALID))
1125 break;
1126
1127 switch (val & VSC9953_MAC_ENTRYTYPE_MASK) {
1128 case VSC9953_MAC_ENTRYTYPE_NORMAL:
1129 printf("%10s ", "Dynamic");
1130 break;
1131 case VSC9953_MAC_ENTRYTYPE_LOCKED:
1132 printf("%10s ", "Static");
1133 break;
1134 case VSC9953_MAC_ENTRYTYPE_IPV4MCAST:
1135 printf("%10s ", "IPv4 Mcast");
1136 break;
1137 case VSC9953_MAC_ENTRYTYPE_IPV6MCAST:
1138 printf("%10s ", "IPv6 Mcast");
1139 break;
1140 default:
1141 printf("%10s ", "Unknown");
1142 }
1143
1144 dest_indx = bitfield_extract_by_mask(val,
1145 VSC9953_MAC_DESTIDX_MASK);
1146
1147 val = in_le32(&l2ana_reg->ana_tables.mach_data);
1148 vlan = bitfield_extract_by_mask(val, VSC9953_MAC_VID_MASK);
1149 mach = bitfield_extract_by_mask(val, VSC9953_MAC_MACH_MASK);
1150 macl = in_le32(&l2ana_reg->ana_tables.macl_data);
1151
1152 printf("%02x:%02x:%02x:%02x:%02x:%02x ", (mach >> 8) & 0xff,
1153 mach & 0xff, (macl >> 24) & 0xff, (macl >> 16) & 0xff,
1154 (macl >> 8) & 0xff, macl & 0xff);
1155 printf("%5d ", dest_indx);
1156 printf("%4d\n", vlan);
1157 } while (1);
1158
1159 /* set learning mode to previous value */
1160 if (port_no == ETHSW_CMD_PORT_ALL) {
1161 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1162 if (!rc[i] && mode[i] != PORT_LEARN_NONE)
1163 vsc9953_port_learn_mode_set(i, mode[i]);
1164 }
1165 } else {
1166 /* If administrative down, skip */
1167 if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE)
1168 vsc9953_port_learn_mode_set(port_no, mode[port_no]);
1169 }
1170
1171 /* reset FDB port and VLAN FDB selection */
1172 clrbits_le32(&l2ana_reg->ana.anag_efil, VSC9953_AGE_PORT_EN |
1173 VSC9953_AGE_PORT_MASK | VSC9953_AGE_VID_EN |
1174 VSC9953_AGE_VID_MASK);
1175}
1176
1177/* Add a static FDB entry */
1178static int vsc9953_mac_table_add(u8 port_no, uchar mac[6], int vid)
1179{
1180 u32 val;
1181 struct vsc9953_analyzer *l2ana_reg;
1182
1183 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1184 VSC9953_ANA_OFFSET);
1185
1186 val = in_le32(&l2ana_reg->ana_tables.mach_data);
1187 val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) |
1188 (mac[0] << 8) | (mac[1] << 0);
1189 out_le32(&l2ana_reg->ana_tables.mach_data, val);
1190
1191 out_le32(&l2ana_reg->ana_tables.macl_data,
1192 (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) |
1193 (mac[5] << 0));
1194
1195 /* set on which port is the MAC address added */
1196 val = in_le32(&l2ana_reg->ana_tables.mac_access);
1197 val = bitfield_replace_by_mask(val, VSC9953_MAC_DESTIDX_MASK, port_no);
1198 out_le32(&l2ana_reg->ana_tables.mac_access, val);
1199
1200 if (vsc9953_mac_table_cmd(MAC_TABLE_LEARN) < 0)
1201 return -1;
1202
1203 /* check if the MAC address was indeed added */
1204 val = in_le32(&l2ana_reg->ana_tables.mach_data);
1205 val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) |
1206 (mac[0] << 8) | (mac[1] << 0);
1207 out_le32(&l2ana_reg->ana_tables.mach_data, val);
1208
1209 out_le32(&l2ana_reg->ana_tables.macl_data,
1210 (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) |
1211 (mac[5] << 0));
1212
1213 if (vsc9953_mac_table_cmd(MAC_TABLE_READ) < 0)
1214 return -1;
1215
1216 val = in_le32(&l2ana_reg->ana_tables.mac_access);
1217
1218 if ((port_no != bitfield_extract_by_mask(val,
1219 VSC9953_MAC_DESTIDX_MASK))) {
1220 printf("Failed to add MAC address\n");
1221 return -1;
1222 }
1223 return 0;
1224}
1225
1226/* Delete a FDB entry */
1227static int vsc9953_mac_table_del(uchar mac[6], u16 vid)
1228{
1229 u32 val;
1230 struct vsc9953_analyzer *l2ana_reg;
1231
1232 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1233 VSC9953_ANA_OFFSET);
1234
1235 /* check first if MAC entry is present */
1236 val = in_le32(&l2ana_reg->ana_tables.mach_data);
1237 val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) |
1238 (mac[0] << 8) | (mac[1] << 0);
1239 out_le32(&l2ana_reg->ana_tables.mach_data, val);
1240
1241 out_le32(&l2ana_reg->ana_tables.macl_data,
1242 (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) |
1243 (mac[5] << 0));
1244
1245 if (vsc9953_mac_table_cmd(MAC_TABLE_LOOKUP) < 0) {
1246 debug("Lookup in the MAC table failed\n");
1247 return -1;
1248 }
1249
1250 if (!(in_le32(&l2ana_reg->ana_tables.mac_access) &
1251 VSC9953_MAC_CMD_VALID)) {
1252 printf("The MAC address: %02x:%02x:%02x:%02x:%02x:%02x ",
1253 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
1254 printf("VLAN: %d does not exist.\n", vid);
1255 return -1;
1256 }
1257
1258 /* FDB entry found, proceed to delete */
1259 val = in_le32(&l2ana_reg->ana_tables.mach_data);
1260 val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) |
1261 (mac[0] << 8) | (mac[1] << 0);
1262 out_le32(&l2ana_reg->ana_tables.mach_data, val);
1263
1264 out_le32(&l2ana_reg->ana_tables.macl_data, (mac[2] << 24) |
1265 (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0));
1266
1267 if (vsc9953_mac_table_cmd(MAC_TABLE_FORGET) < 0)
1268 return -1;
1269
1270 /* check if the MAC entry is still in FDB */
1271 val = in_le32(&l2ana_reg->ana_tables.mach_data);
1272 val = bitfield_replace_by_mask(val, VSC9953_MACHDATA_VID_MASK, vid) |
1273 (mac[0] << 8) | (mac[1] << 0);
1274 out_le32(&l2ana_reg->ana_tables.mach_data, val);
1275
1276 out_le32(&l2ana_reg->ana_tables.macl_data, (mac[2] << 24) |
1277 (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0));
1278
1279 if (vsc9953_mac_table_cmd(MAC_TABLE_LOOKUP) < 0) {
1280 debug("Lookup in the MAC table failed\n");
1281 return -1;
1282 }
1283 if (in_le32(&l2ana_reg->ana_tables.mac_access) &
1284 VSC9953_MAC_CMD_VALID) {
1285 printf("Failed to delete MAC address\n");
1286 return -1;
1287 }
1288
1289 return 0;
1290}
1291
1292/* age the unlocked entries in FDB */
1293static void vsc9953_mac_table_age(int port_no, int vid)
1294{
1295 int rc[VSC9953_MAX_PORTS];
1296 enum port_learn_mode mode[VSC9953_MAX_PORTS];
1297 u32 val;
1298 int i;
1299 struct vsc9953_analyzer *l2ana_reg;
1300
1301 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1302 VSC9953_ANA_OFFSET);
1303
1304 /* set port and VID for selective aging */
1305 val = in_le32(&l2ana_reg->ana.anag_efil);
1306 if (port_no != ETHSW_CMD_PORT_ALL) {
1307 /* disable auto learning */
1308 rc[port_no] = vsc9953_port_learn_mode_get(port_no,
1309 &mode[port_no]);
1310 if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE)
1311 vsc9953_port_learn_mode_set(port_no, PORT_LEARN_NONE);
1312
1313 val = bitfield_replace_by_mask(val, VSC9953_AGE_PORT_MASK,
1314 port_no) | VSC9953_AGE_PORT_EN;
1315 } else {
1316 /* disable auto learning on all ports */
1317 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1318 rc[i] = vsc9953_port_learn_mode_get(i, &mode[i]);
1319 if (!rc[i] && mode[i] != PORT_LEARN_NONE)
1320 vsc9953_port_learn_mode_set(i, PORT_LEARN_NONE);
1321 }
1322 }
1323
1324 if (vid != ETHSW_CMD_VLAN_ALL) {
1325 val = bitfield_replace_by_mask(val, VSC9953_AGE_VID_MASK, vid) |
1326 VSC9953_AGE_VID_EN;
1327 }
1328 out_le32(&l2ana_reg->ana.anag_efil, val);
1329
1330 /* age the dynamic FDB entries */
1331 vsc9953_mac_table_cmd(MAC_TABLE_AGE);
1332
1333 /* clear previously set port and VID */
1334 clrbits_le32(&l2ana_reg->ana.anag_efil, VSC9953_AGE_PORT_EN |
1335 VSC9953_AGE_PORT_MASK | VSC9953_AGE_VID_EN |
1336 VSC9953_AGE_VID_MASK);
1337
1338 if (port_no != ETHSW_CMD_PORT_ALL) {
1339 if (!rc[port_no] && mode[port_no] != PORT_LEARN_NONE)
1340 vsc9953_port_learn_mode_set(port_no, mode[port_no]);
1341 } else {
1342 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1343 if (!rc[i] && mode[i] != PORT_LEARN_NONE)
1344 vsc9953_port_learn_mode_set(i, mode[i]);
1345 }
1346 }
1347}
1348
1349/* Delete all the dynamic FDB entries */
1350static void vsc9953_mac_table_flush(int port, int vid)
1351{
1352 vsc9953_mac_table_age(port, vid);
1353 vsc9953_mac_table_age(port, vid);
1354}
1355
Codrin Ciubotariu4718f952015-07-24 16:55:33 +03001356enum egress_vlan_tag {
1357 EGR_TAG_CLASS = 0,
1358 EGR_TAG_PVID,
1359};
1360
1361/* Set egress tag mode for a VSC9953 port */
1362static void vsc9953_port_vlan_egress_tag_set(int port_no,
1363 enum egress_vlan_tag mode)
1364{
1365 struct vsc9953_rew_reg *l2rew_reg;
1366
1367 l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
1368 VSC9953_REW_OFFSET);
1369
1370 switch (mode) {
1371 case EGR_TAG_CLASS:
1372 clrbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
1373 VSC9953_TAG_VID_PVID);
1374 break;
1375 case EGR_TAG_PVID:
1376 setbits_le32(&l2rew_reg->port[port_no].port_tag_cfg,
1377 VSC9953_TAG_VID_PVID);
1378 break;
1379 default:
1380 printf("Unknown egress VLAN tag mode for port %d\n", port_no);
1381 }
1382}
1383
1384/* Get egress tag mode for a VSC9953 port */
1385static void vsc9953_port_vlan_egress_tag_get(int port_no,
1386 enum egress_vlan_tag *mode)
1387{
1388 u32 val;
1389 struct vsc9953_rew_reg *l2rew_reg;
1390
1391 l2rew_reg = (struct vsc9953_rew_reg *)(VSC9953_OFFSET +
1392 VSC9953_REW_OFFSET);
1393
1394 val = in_le32(&l2rew_reg->port[port_no].port_tag_cfg);
1395 if (val & VSC9953_TAG_VID_PVID)
1396 *mode = EGR_TAG_PVID;
1397 else
1398 *mode = EGR_TAG_CLASS;
1399}
1400
Codrin Ciubotariu3a74bbe2015-07-24 16:55:34 +03001401/* VSC9953 VLAN learning modes */
1402enum vlan_learning_mode {
1403 SHARED_VLAN_LEARNING,
1404 PRIVATE_VLAN_LEARNING,
1405};
1406
1407/* Set VLAN learning mode for VSC9953 */
1408static void vsc9953_vlan_learning_set(enum vlan_learning_mode lrn_mode)
1409{
1410 struct vsc9953_analyzer *l2ana_reg;
1411
1412 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1413 VSC9953_ANA_OFFSET);
1414
1415 switch (lrn_mode) {
1416 case SHARED_VLAN_LEARNING:
1417 setbits_le32(&l2ana_reg->ana.agen_ctrl, VSC9953_FID_MASK_ALL);
1418 break;
1419 case PRIVATE_VLAN_LEARNING:
1420 clrbits_le32(&l2ana_reg->ana.agen_ctrl, VSC9953_FID_MASK_ALL);
1421 break;
1422 default:
1423 printf("Unknown VLAN learn mode\n");
1424 }
1425}
1426
1427/* Get VLAN learning mode for VSC9953 */
1428static int vsc9953_vlan_learning_get(enum vlan_learning_mode *lrn_mode)
1429{
1430 u32 val;
1431 struct vsc9953_analyzer *l2ana_reg;
1432
1433 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1434 VSC9953_ANA_OFFSET);
1435
1436 val = in_le32(&l2ana_reg->ana.agen_ctrl);
1437
1438 if (!(val & VSC9953_FID_MASK_ALL)) {
1439 *lrn_mode = PRIVATE_VLAN_LEARNING;
1440 } else if ((val & VSC9953_FID_MASK_ALL) == VSC9953_FID_MASK_ALL) {
1441 *lrn_mode = SHARED_VLAN_LEARNING;
1442 } else {
1443 printf("Unknown VLAN learning mode\n");
1444 return -EINVAL;
1445 }
1446
1447 return 0;
1448}
1449
Codrin Ciubotariud1c9fe52015-07-24 16:55:35 +03001450/* Enable/disable VLAN ingress filtering on a VSC9953 port */
1451static void vsc9953_port_ingress_filtering_set(int port_no, int enabled)
1452{
1453 struct vsc9953_analyzer *l2ana_reg;
1454
1455 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1456 VSC9953_ANA_OFFSET);
1457
1458 if (enabled)
1459 setbits_le32(&l2ana_reg->ana.vlan_mask, 1 << port_no);
1460 else
1461 clrbits_le32(&l2ana_reg->ana.vlan_mask, 1 << port_no);
1462}
1463
1464/* Return VLAN ingress filtering on a VSC9953 port */
1465static int vsc9953_port_ingress_filtering_get(int port_no)
1466{
1467 u32 val;
1468 struct vsc9953_analyzer *l2ana_reg;
1469
1470 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
1471 VSC9953_ANA_OFFSET);
1472
1473 val = in_le32(&l2ana_reg->ana.vlan_mask);
1474 return !!(val & (1 << port_no));
1475}
1476
Codrin Ciubotariu2f52a3f2015-07-24 16:55:28 +03001477static int vsc9953_port_status_key_func(struct ethsw_command_def *parsed_cmd)
1478{
1479 int i;
1480 u8 enabled;
1481
1482 /* Last keyword should tell us if we should enable/disable the port */
1483 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1484 ethsw_id_enable)
1485 enabled = 1;
1486 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1487 ethsw_id_disable)
1488 enabled = 0;
1489 else
1490 return CMD_RET_USAGE;
1491
1492 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1493 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1494 printf("Invalid port number: %d\n", parsed_cmd->port);
1495 return CMD_RET_FAILURE;
1496 }
1497 vsc9953_port_status_set(parsed_cmd->port, enabled);
1498 } else {
1499 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1500 vsc9953_port_status_set(i, enabled);
1501 }
1502
1503 return CMD_RET_SUCCESS;
1504}
1505
1506static int vsc9953_port_config_key_func(struct ethsw_command_def *parsed_cmd)
1507{
1508 int i;
1509
1510 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1511 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1512 printf("Invalid port number: %d\n", parsed_cmd->port);
1513 return CMD_RET_FAILURE;
1514 }
1515 vsc9953_phy_autoneg(parsed_cmd->port);
1516 printf("%8s %8s %8s %8s %8s\n",
1517 "Port", "Status", "Link", "Speed",
1518 "Duplex");
1519 vsc9953_port_config_show(parsed_cmd->port);
1520
1521 } else {
1522 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1523 vsc9953_phy_autoneg(i);
1524 printf("%8s %8s %8s %8s %8s\n",
1525 "Port", "Status", "Link", "Speed", "Duplex");
1526 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1527 vsc9953_port_config_show(i);
1528 }
1529
1530 return CMD_RET_SUCCESS;
1531}
1532
Codrin Ciubotariuc0034732015-07-24 16:55:29 +03001533static int vsc9953_port_stats_key_func(struct ethsw_command_def *parsed_cmd)
1534{
1535 int i;
1536
1537 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1538 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1539 printf("Invalid port number: %d\n", parsed_cmd->port);
1540 return CMD_RET_FAILURE;
1541 }
1542 vsc9953_port_statistics_show(parsed_cmd->port);
1543 } else {
1544 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1545 vsc9953_port_statistics_show(i);
1546 }
1547
1548 return CMD_RET_SUCCESS;
1549}
1550
1551static int vsc9953_port_stats_clear_key_func(struct ethsw_command_def
1552 *parsed_cmd)
1553{
1554 int i;
1555
1556 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1557 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1558 printf("Invalid port number: %d\n", parsed_cmd->port);
1559 return CMD_RET_FAILURE;
1560 }
1561 vsc9953_port_statistics_clear(parsed_cmd->port);
1562 } else {
1563 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1564 vsc9953_port_statistics_clear(i);
1565 }
1566
1567 return CMD_RET_SUCCESS;
1568}
1569
Codrin Ciubotariu2d1607f2015-07-24 16:55:30 +03001570static int vsc9953_learn_show_key_func(struct ethsw_command_def *parsed_cmd)
1571{
1572 int i;
1573 enum port_learn_mode mode;
1574
1575 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1576 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1577 printf("Invalid port number: %d\n", parsed_cmd->port);
1578 return CMD_RET_FAILURE;
1579 }
1580 if (vsc9953_port_learn_mode_get(parsed_cmd->port, &mode))
1581 return CMD_RET_FAILURE;
1582 printf("%7s %11s\n", "Port", "Learn mode");
1583 switch (mode) {
1584 case PORT_LEARN_NONE:
1585 printf("%7d %11s\n", parsed_cmd->port, "disable");
1586 break;
1587 case PORT_LEARN_AUTO:
1588 printf("%7d %11s\n", parsed_cmd->port, "auto");
1589 break;
1590 default:
1591 printf("%7d %11s\n", parsed_cmd->port, "-");
1592 }
1593 } else {
1594 printf("%7s %11s\n", "Port", "Learn mode");
1595 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1596 if (vsc9953_port_learn_mode_get(i, &mode))
1597 continue;
1598 switch (mode) {
1599 case PORT_LEARN_NONE:
1600 printf("%7d %11s\n", i, "disable");
1601 break;
1602 case PORT_LEARN_AUTO:
1603 printf("%7d %11s\n", i, "auto");
1604 break;
1605 default:
1606 printf("%7d %11s\n", i, "-");
1607 }
1608 }
1609 }
1610
1611 return CMD_RET_SUCCESS;
1612}
1613
1614static int vsc9953_learn_set_key_func(struct ethsw_command_def *parsed_cmd)
1615{
1616 int i;
1617 enum port_learn_mode mode;
1618
1619 /* Last keyword should tell us the learn mode */
1620 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1621 ethsw_id_auto)
1622 mode = PORT_LEARN_AUTO;
1623 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1624 ethsw_id_disable)
1625 mode = PORT_LEARN_NONE;
1626 else
1627 return CMD_RET_USAGE;
1628
1629 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1630 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1631 printf("Invalid port number: %d\n", parsed_cmd->port);
1632 return CMD_RET_FAILURE;
1633 }
1634 vsc9953_port_learn_mode_set(parsed_cmd->port, mode);
1635 } else {
1636 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1637 vsc9953_port_learn_mode_set(i, mode);
1638 }
1639
Codrin Ciubotariu4732e352015-09-09 18:00:52 +03001640 return CMD_RET_SUCCESS;
1641}
1642
1643static int vsc9953_fdb_show_key_func(struct ethsw_command_def *parsed_cmd)
1644{
1645 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL &&
1646 !VSC9953_PORT_CHECK(parsed_cmd->port)) {
1647 printf("Invalid port number: %d\n", parsed_cmd->port);
1648 return CMD_RET_FAILURE;
1649 }
1650
1651 if (parsed_cmd->vid != ETHSW_CMD_VLAN_ALL &&
1652 !VSC9953_VLAN_CHECK(parsed_cmd->vid)) {
1653 printf("Invalid VID number: %d\n", parsed_cmd->vid);
1654 return CMD_RET_FAILURE;
1655 }
1656
1657 vsc9953_mac_table_show(parsed_cmd->port, parsed_cmd->vid);
1658
1659 return CMD_RET_SUCCESS;
1660}
1661
1662static int vsc9953_fdb_flush_key_func(struct ethsw_command_def *parsed_cmd)
1663{
1664 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL &&
1665 !VSC9953_PORT_CHECK(parsed_cmd->port)) {
1666 printf("Invalid port number: %d\n", parsed_cmd->port);
1667 return CMD_RET_FAILURE;
1668 }
1669
1670 if (parsed_cmd->vid != ETHSW_CMD_VLAN_ALL &&
1671 !VSC9953_VLAN_CHECK(parsed_cmd->vid)) {
1672 printf("Invalid VID number: %d\n", parsed_cmd->vid);
1673 return CMD_RET_FAILURE;
1674 }
1675
1676 vsc9953_mac_table_flush(parsed_cmd->port, parsed_cmd->vid);
1677
1678 return CMD_RET_SUCCESS;
1679}
1680
1681static int vsc9953_fdb_entry_add_key_func(struct ethsw_command_def *parsed_cmd)
1682{
1683 int vid;
1684
1685 /* a port number must be present */
1686 if (parsed_cmd->port == ETHSW_CMD_PORT_ALL) {
1687 printf("Please specify a port\n");
1688 return CMD_RET_FAILURE;
1689 }
1690
1691 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1692 printf("Invalid port number: %d\n", parsed_cmd->port);
1693 return CMD_RET_FAILURE;
1694 }
1695
1696 /* Use VLAN 1 if VID is not set */
1697 vid = (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL ? 1 : parsed_cmd->vid);
1698
1699 if (!VSC9953_VLAN_CHECK(vid)) {
1700 printf("Invalid VID number: %d\n", vid);
1701 return CMD_RET_FAILURE;
1702 }
1703
1704 if (vsc9953_mac_table_add(parsed_cmd->port, parsed_cmd->ethaddr, vid))
1705 return CMD_RET_FAILURE;
1706
1707 return CMD_RET_SUCCESS;
1708}
1709
1710static int vsc9953_fdb_entry_del_key_func(struct ethsw_command_def *parsed_cmd)
1711{
1712 int vid;
1713
1714 /* Use VLAN 1 if VID is not set */
1715 vid = (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL ? 1 : parsed_cmd->vid);
1716
1717 if (!VSC9953_VLAN_CHECK(vid)) {
1718 printf("Invalid VID number: %d\n", vid);
1719 return CMD_RET_FAILURE;
1720 }
1721
1722 if (vsc9953_mac_table_del(parsed_cmd->ethaddr, vid))
1723 return CMD_RET_FAILURE;
Codrin Ciubotariu4718f952015-07-24 16:55:33 +03001724
1725 return CMD_RET_SUCCESS;
1726}
1727
1728static int vsc9953_pvid_show_key_func(struct ethsw_command_def *parsed_cmd)
1729{
1730 int i;
1731 int pvid;
1732
1733 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1734 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1735 printf("Invalid port number: %d\n", parsed_cmd->port);
1736 return CMD_RET_FAILURE;
1737 }
1738
1739 if (vsc9953_port_vlan_pvid_get(parsed_cmd->port, &pvid))
1740 return CMD_RET_FAILURE;
1741 printf("%7s %7s\n", "Port", "PVID");
1742 printf("%7d %7d\n", parsed_cmd->port, pvid);
1743 } else {
1744 printf("%7s %7s\n", "Port", "PVID");
1745 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1746 if (vsc9953_port_vlan_pvid_get(i, &pvid))
1747 continue;
1748 printf("%7d %7d\n", i, pvid);
1749 }
1750 }
1751
1752 return CMD_RET_SUCCESS;
1753}
1754
1755static int vsc9953_pvid_set_key_func(struct ethsw_command_def *parsed_cmd)
1756{
1757 /* PVID number should be set in parsed_cmd->vid */
1758 if (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL) {
1759 printf("Please set a pvid value\n");
1760 return CMD_RET_FAILURE;
1761 }
1762
1763 if (!VSC9953_VLAN_CHECK(parsed_cmd->vid)) {
1764 printf("Invalid VID number: %d\n", parsed_cmd->vid);
1765 return CMD_RET_FAILURE;
1766 }
1767
1768 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1769 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1770 printf("Invalid port number: %d\n", parsed_cmd->port);
1771 return CMD_RET_FAILURE;
1772 }
1773 vsc9953_port_vlan_pvid_set(parsed_cmd->port, parsed_cmd->vid);
1774 } else {
1775 vsc9953_port_all_vlan_pvid_set(parsed_cmd->vid);
1776 }
1777
1778 return CMD_RET_SUCCESS;
1779}
1780
1781static int vsc9953_vlan_show_key_func(struct ethsw_command_def *parsed_cmd)
1782{
1783 int i;
1784
1785 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1786 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1787 printf("Invalid port number: %d\n", parsed_cmd->port);
1788 return CMD_RET_FAILURE;
1789 }
1790 vsc9953_vlan_membership_show(parsed_cmd->port);
1791 } else {
1792 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1793 vsc9953_vlan_membership_show(i);
1794 }
1795
1796 return CMD_RET_SUCCESS;
1797}
1798
1799static int vsc9953_vlan_set_key_func(struct ethsw_command_def *parsed_cmd)
1800{
1801 int i;
1802 int add;
1803
1804 /* VLAN should be set in parsed_cmd->vid */
1805 if (parsed_cmd->vid == ETHSW_CMD_VLAN_ALL) {
1806 printf("Please set a vlan value\n");
1807 return CMD_RET_FAILURE;
1808 }
1809
1810 if (!VSC9953_VLAN_CHECK(parsed_cmd->vid)) {
1811 printf("Invalid VID number: %d\n", parsed_cmd->vid);
1812 return CMD_RET_FAILURE;
1813 }
1814
1815 /* keywords add/delete should be the last but one in array */
1816 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 2] ==
1817 ethsw_id_add)
1818 add = 1;
1819 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 2] ==
1820 ethsw_id_del)
1821 add = 0;
1822 else
1823 return CMD_RET_USAGE;
1824
1825 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1826 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1827 printf("Invalid port number: %d\n", parsed_cmd->port);
1828 return CMD_RET_FAILURE;
1829 }
1830 vsc9953_vlan_table_membership_set(parsed_cmd->vid,
1831 parsed_cmd->port, add);
1832 } else {
1833 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1834 vsc9953_vlan_table_membership_set(parsed_cmd->vid, i,
1835 add);
1836 }
1837
1838 return CMD_RET_SUCCESS;
1839}
1840static int vsc9953_port_untag_show_key_func(
1841 struct ethsw_command_def *parsed_cmd)
1842{
1843 int i;
1844
1845 printf("%7s\t%17s\n", "Port", "Untag");
1846 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1847 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1848 printf("Invalid port number: %d\n", parsed_cmd->port);
1849 return CMD_RET_FAILURE;
1850 }
1851 vsc9953_port_vlan_egr_untag_show(parsed_cmd->port);
1852 } else {
1853 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1854 vsc9953_port_vlan_egr_untag_show(i);
1855 }
1856
1857 return CMD_RET_SUCCESS;
1858}
1859
1860static int vsc9953_port_untag_set_key_func(struct ethsw_command_def *parsed_cmd)
1861{
1862 int i;
1863 enum egress_untag_mode mode;
1864
1865 /* keywords for the untagged mode are the last in the array */
1866 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1867 ethsw_id_all)
1868 mode = EGRESS_UNTAG_ALL;
1869 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1870 ethsw_id_none)
1871 mode = EGRESS_UNTAG_NONE;
1872 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1873 ethsw_id_pvid)
1874 mode = EGRESS_UNTAG_PVID_AND_ZERO;
1875 else
1876 return CMD_RET_USAGE;
1877
1878 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1879 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1880 printf("Invalid port number: %d\n", parsed_cmd->port);
1881 return CMD_RET_FAILURE;
1882 }
1883 vsc9953_port_vlan_egr_untag_set(parsed_cmd->port, mode);
1884 } else {
1885 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1886 vsc9953_port_vlan_egr_untag_set(i, mode);
1887 }
1888
1889 return CMD_RET_SUCCESS;
1890}
1891
1892static int vsc9953_egr_vlan_tag_show_key_func(
1893 struct ethsw_command_def *parsed_cmd)
1894{
1895 int i;
1896 enum egress_vlan_tag mode;
1897
1898 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1899 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1900 printf("Invalid port number: %d\n", parsed_cmd->port);
1901 return CMD_RET_FAILURE;
1902 }
1903 vsc9953_port_vlan_egress_tag_get(parsed_cmd->port, &mode);
1904 printf("%7s\t%12s\n", "Port", "Egress VID");
1905 printf("%7d\t", parsed_cmd->port);
1906 switch (mode) {
1907 case EGR_TAG_CLASS:
1908 printf("%12s\n", "classified");
1909 break;
1910 case EGR_TAG_PVID:
1911 printf("%12s\n", "pvid");
1912 break;
1913 default:
1914 printf("%12s\n", "-");
1915 }
1916 } else {
1917 printf("%7s\t%12s\n", "Port", "Egress VID");
1918 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
1919 vsc9953_port_vlan_egress_tag_get(i, &mode);
1920 switch (mode) {
1921 case EGR_TAG_CLASS:
1922 printf("%7d\t%12s\n", i, "classified");
1923 break;
1924 case EGR_TAG_PVID:
1925 printf("%7d\t%12s\n", i, "pvid");
1926 break;
1927 default:
1928 printf("%7d\t%12s\n", i, "-");
1929 }
1930 }
1931 }
1932
1933 return CMD_RET_SUCCESS;
1934}
1935
1936static int vsc9953_egr_vlan_tag_set_key_func(
1937 struct ethsw_command_def *parsed_cmd)
1938{
1939 int i;
1940 enum egress_vlan_tag mode;
1941
1942 /* keywords for the egress vlan tag mode are the last in the array */
1943 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1944 ethsw_id_pvid)
1945 mode = EGR_TAG_PVID;
1946 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1947 ethsw_id_classified)
1948 mode = EGR_TAG_CLASS;
1949 else
1950 return CMD_RET_USAGE;
1951
1952 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
1953 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
1954 printf("Invalid port number: %d\n", parsed_cmd->port);
1955 return CMD_RET_FAILURE;
1956 }
1957 vsc9953_port_vlan_egress_tag_set(parsed_cmd->port, mode);
1958 } else {
1959 for (i = 0; i < VSC9953_MAX_PORTS; i++)
1960 vsc9953_port_vlan_egress_tag_set(i, mode);
1961 }
Codrin Ciubotariu4732e352015-09-09 18:00:52 +03001962
Codrin Ciubotariu2d1607f2015-07-24 16:55:30 +03001963 return CMD_RET_SUCCESS;
1964}
1965
Codrin Ciubotariu3a74bbe2015-07-24 16:55:34 +03001966static int vsc9953_vlan_learn_show_key_func(
1967 struct ethsw_command_def *parsed_cmd)
1968{
1969 int rc;
1970 enum vlan_learning_mode mode;
1971
1972 rc = vsc9953_vlan_learning_get(&mode);
1973 if (rc)
1974 return CMD_RET_FAILURE;
1975
1976 switch (mode) {
1977 case SHARED_VLAN_LEARNING:
1978 printf("VLAN learning mode: shared\n");
1979 break;
1980 case PRIVATE_VLAN_LEARNING:
1981 printf("VLAN learning mode: private\n");
1982 break;
1983 default:
1984 printf("Unknown VLAN learning mode\n");
1985 rc = CMD_RET_FAILURE;
1986 }
1987
1988 return CMD_RET_SUCCESS;
1989}
1990
1991static int vsc9953_vlan_learn_set_key_func(struct ethsw_command_def *parsed_cmd)
1992{
1993 enum vlan_learning_mode mode;
1994
1995 /* keywords for shared/private are the last in the array */
1996 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
1997 ethsw_id_shared)
1998 mode = SHARED_VLAN_LEARNING;
1999 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
2000 ethsw_id_private)
2001 mode = PRIVATE_VLAN_LEARNING;
2002 else
2003 return CMD_RET_USAGE;
2004
2005 vsc9953_vlan_learning_set(mode);
2006
2007 return CMD_RET_SUCCESS;
2008}
2009
Codrin Ciubotariud1c9fe52015-07-24 16:55:35 +03002010static int vsc9953_ingr_fltr_show_key_func(struct ethsw_command_def *parsed_cmd)
2011{
2012 int i;
2013 int enabled;
2014
2015 printf("%7s\t%18s\n", "Port", "Ingress filtering");
2016 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
2017 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
2018 printf("Invalid port number: %d\n", parsed_cmd->port);
2019 return CMD_RET_FAILURE;
2020 }
2021 enabled = vsc9953_port_ingress_filtering_get(parsed_cmd->port);
2022 printf("%7d\t%18s\n", parsed_cmd->port, enabled ? "enable" :
2023 "disable");
2024 } else {
2025 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
2026 enabled = vsc9953_port_ingress_filtering_get(i);
2027 printf("%7d\t%18s\n", parsed_cmd->port, enabled ?
2028 "enable" :
2029 "disable");
2030 }
2031 }
2032
2033 return CMD_RET_SUCCESS;
2034}
2035
2036static int vsc9953_ingr_fltr_set_key_func(struct ethsw_command_def *parsed_cmd)
2037{
2038 int i;
2039 int enable;
2040
2041 /* keywords for enabling/disabling ingress filtering
2042 * are the last in the array
2043 */
2044 if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
2045 ethsw_id_enable)
2046 enable = 1;
2047 else if (parsed_cmd->cmd_to_keywords[parsed_cmd->cmd_keywords_nr - 1] ==
2048 ethsw_id_disable)
2049 enable = 0;
2050 else
2051 return CMD_RET_USAGE;
2052
2053 if (parsed_cmd->port != ETHSW_CMD_PORT_ALL) {
2054 if (!VSC9953_PORT_CHECK(parsed_cmd->port)) {
2055 printf("Invalid port number: %d\n", parsed_cmd->port);
2056 return CMD_RET_FAILURE;
2057 }
2058 vsc9953_port_ingress_filtering_set(parsed_cmd->port, enable);
2059 } else {
2060 for (i = 0; i < VSC9953_MAX_PORTS; i++)
2061 vsc9953_port_ingress_filtering_set(i, enable);
2062 }
2063
2064 return CMD_RET_SUCCESS;
2065}
2066
Codrin Ciubotariu2f52a3f2015-07-24 16:55:28 +03002067static struct ethsw_command_func vsc9953_cmd_func = {
2068 .ethsw_name = "L2 Switch VSC9953",
2069 .port_enable = &vsc9953_port_status_key_func,
2070 .port_disable = &vsc9953_port_status_key_func,
2071 .port_show = &vsc9953_port_config_key_func,
Codrin Ciubotariuc0034732015-07-24 16:55:29 +03002072 .port_stats = &vsc9953_port_stats_key_func,
2073 .port_stats_clear = &vsc9953_port_stats_clear_key_func,
Codrin Ciubotariu2d1607f2015-07-24 16:55:30 +03002074 .port_learn = &vsc9953_learn_set_key_func,
2075 .port_learn_show = &vsc9953_learn_show_key_func,
Codrin Ciubotariu4732e352015-09-09 18:00:52 +03002076 .fdb_show = &vsc9953_fdb_show_key_func,
2077 .fdb_flush = &vsc9953_fdb_flush_key_func,
2078 .fdb_entry_add = &vsc9953_fdb_entry_add_key_func,
2079 .fdb_entry_del = &vsc9953_fdb_entry_del_key_func,
Codrin Ciubotariu4718f952015-07-24 16:55:33 +03002080 .pvid_show = &vsc9953_pvid_show_key_func,
2081 .pvid_set = &vsc9953_pvid_set_key_func,
2082 .vlan_show = &vsc9953_vlan_show_key_func,
2083 .vlan_set = &vsc9953_vlan_set_key_func,
2084 .port_untag_show = &vsc9953_port_untag_show_key_func,
2085 .port_untag_set = &vsc9953_port_untag_set_key_func,
2086 .port_egr_vlan_show = &vsc9953_egr_vlan_tag_show_key_func,
2087 .port_egr_vlan_set = &vsc9953_egr_vlan_tag_set_key_func,
Codrin Ciubotariu3a74bbe2015-07-24 16:55:34 +03002088 .vlan_learn_show = &vsc9953_vlan_learn_show_key_func,
2089 .vlan_learn_set = &vsc9953_vlan_learn_set_key_func,
Codrin Ciubotariud1c9fe52015-07-24 16:55:35 +03002090 .port_ingr_filt_show = &vsc9953_ingr_fltr_show_key_func,
2091 .port_ingr_filt_set = &vsc9953_ingr_fltr_set_key_func
Codrin Ciubotariu2f52a3f2015-07-24 16:55:28 +03002092};
2093
2094#endif /* CONFIG_CMD_ETHSW */
2095
Codrin Ciubotariu43db9702015-07-24 16:55:26 +03002096/*****************************************************************************
2097At startup, the default configuration would be:
2098 - HW learning enabled on all ports; (HW default)
2099 - All ports are in VLAN 1;
2100 - All ports are VLAN aware;
2101 - All ports have POP_COUNT 1;
2102 - All ports have PVID 1;
2103 - All ports have TPID 0x8100; (HW default)
2104 - All ports tag frames classified to all VLANs that are not PVID;
2105*****************************************************************************/
2106void vsc9953_default_configuration(void)
2107{
2108 int i;
2109
2110 for (i = 0; i < VSC9953_MAX_VLAN; i++)
2111 vsc9953_vlan_table_membership_all_set(i, 0);
2112 vsc9953_port_all_vlan_aware_set(1);
2113 vsc9953_port_all_vlan_pvid_set(1);
2114 vsc9953_port_all_vlan_poncnt_set(1);
2115 vsc9953_vlan_table_membership_all_set(1, 1);
2116 vsc9953_vlan_ingr_fltr_learn_drop(1);
2117 vsc9953_port_all_vlan_egress_untagged_set(EGRESS_UNTAG_PVID_AND_ZERO);
2118}
2119
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002120void vsc9953_init(bd_t *bis)
2121{
Codrin Ciubotariue111c322015-07-24 16:52:45 +03002122 u32 i;
2123 u32 hdx_cfg = 0;
2124 u32 phy_addr = 0;
2125 int timeout;
2126 struct vsc9953_system_reg *l2sys_reg;
2127 struct vsc9953_qsys_reg *l2qsys_reg;
2128 struct vsc9953_dev_gmii *l2dev_gmii_reg;
2129 struct vsc9953_analyzer *l2ana_reg;
2130 struct vsc9953_devcpu_gcb *l2dev_gcb;
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002131
2132 l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(VSC9953_OFFSET +
2133 VSC9953_DEV_GMII_OFFSET);
2134
2135 l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
2136 VSC9953_ANA_OFFSET);
2137
2138 l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
2139 VSC9953_SYS_OFFSET);
2140
2141 l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
2142 VSC9953_QSYS_OFFSET);
2143
2144 l2dev_gcb = (struct vsc9953_devcpu_gcb *)(VSC9953_OFFSET +
2145 VSC9953_DEVCPU_GCB);
2146
2147 out_le32(&l2dev_gcb->chip_regs.soft_rst,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002148 VSC9953_SOFT_SWC_RST_ENA);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002149 timeout = 50000;
2150 while ((in_le32(&l2dev_gcb->chip_regs.soft_rst) &
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002151 VSC9953_SOFT_SWC_RST_ENA) && --timeout)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002152 udelay(1); /* busy wait for vsc9953 soft reset */
2153 if (timeout == 0)
2154 debug("Timeout waiting for VSC9953 to reset\n");
2155
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002156 out_le32(&l2sys_reg->sys.reset_cfg, VSC9953_MEM_ENABLE |
2157 VSC9953_MEM_INIT);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002158
2159 timeout = 50000;
2160 while ((in_le32(&l2sys_reg->sys.reset_cfg) &
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002161 VSC9953_MEM_INIT) && --timeout)
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002162 udelay(1); /* busy wait for vsc9953 memory init */
2163 if (timeout == 0)
2164 debug("Timeout waiting for VSC9953 memory to initialize\n");
2165
2166 out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg)
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002167 | VSC9953_CORE_ENABLE));
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002168
2169 /* VSC9953 Setting to be done once only */
2170 out_le32(&l2qsys_reg->sys.ext_cpu_cfg, 0x00000b00);
2171
2172 for (i = 0; i < VSC9953_MAX_PORTS; i++) {
2173 if (vsc9953_port_init(i))
2174 printf("Failed to initialize l2switch port %d\n", i);
2175
2176 /* Enable VSC9953 GMII Ports Port ID 0 - 7 */
2177 if (VSC9953_INTERNAL_PORT_CHECK(i)) {
2178 out_le32(&l2ana_reg->pfc[i].pfc_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002179 VSC9953_PFC_FC_QSGMII);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002180 out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002181 VSC9953_MAC_FC_CFG_QSGMII);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002182 } else {
2183 out_le32(&l2ana_reg->pfc[i].pfc_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002184 VSC9953_PFC_FC);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002185 out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002186 VSC9953_MAC_FC_CFG);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002187 }
2188 out_le32(&l2dev_gmii_reg->port_mode.clock_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002189 VSC9953_CLOCK_CFG);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002190 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ena_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002191 VSC9953_MAC_ENA_CFG);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002192 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_mode_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002193 VSC9953_MAC_MODE_CFG);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002194 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ifg_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002195 VSC9953_MAC_IFG_CFG);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002196 /* mac_hdx_cfg varies with port id*/
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002197 hdx_cfg = VSC9953_MAC_HDX_CFG | (i << 16);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002198 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_hdx_cfg, hdx_cfg);
2199 out_le32(&l2sys_reg->sys.front_port_mode[i],
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002200 VSC9953_FRONT_PORT_MODE);
Codrin Ciubotariu9f3c87f2015-07-24 16:52:46 +03002201 setbits_le32(&l2qsys_reg->sys.switch_port_mode[i],
2202 VSC9953_PORT_ENA);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002203 out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_maxlen_cfg,
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002204 VSC9953_MAC_MAX_LEN);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002205 out_le32(&l2sys_reg->pause_cfg.pause_cfg[i],
Codrin Ciubotariu5ab96442015-07-24 16:52:44 +03002206 VSC9953_PAUSE_CFG);
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002207 /* WAIT FOR 2 us*/
2208 udelay(2);
2209
2210 l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(
2211 (char *)l2dev_gmii_reg
2212 + T1040_SWITCH_GMII_DEV_OFFSET);
2213
2214 /* Initialize Lynx PHY Wrappers */
2215 phy_addr = 0;
2216 if (vsc9953_l2sw.port[i].enet_if ==
2217 PHY_INTERFACE_MODE_QSGMII)
2218 phy_addr = (i + 0x4) & 0x1F;
2219 else if (vsc9953_l2sw.port[i].enet_if ==
2220 PHY_INTERFACE_MODE_SGMII)
2221 phy_addr = (i + 1) & 0x1F;
2222
2223 if (phy_addr) {
2224 /* SGMII IF mode + AN enable */
2225 vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
2226 0x14, PHY_SGMII_IF_MODE_AN |
2227 PHY_SGMII_IF_MODE_SGMII);
2228 /* Dev ability according to SGMII specification */
2229 vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
2230 0x4, PHY_SGMII_DEV_ABILITY_SGMII);
2231 /* Adjust link timer for SGMII
2232 * 1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40
2233 */
2234 vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
2235 0x13, 0x0003);
2236 vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
2237 0x12, 0x0d40);
2238 /* Restart AN */
2239 vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
2240 0x0, PHY_SGMII_CR_DEF_VAL |
2241 PHY_SGMII_CR_RESET_AN);
2242
2243 timeout = 50000;
2244 while ((vsc9953_mdio_read(&l2dev_gcb->mii_mng[0],
2245 phy_addr, 0x01) & 0x0020) && --timeout)
2246 udelay(1); /* wait for AN to complete */
2247 if (timeout == 0)
2248 debug("Timeout waiting for AN to complete\n");
2249 }
2250 }
2251
Codrin Ciubotariu43db9702015-07-24 16:55:26 +03002252 vsc9953_default_configuration();
2253
Codrin Ciubotariu2f52a3f2015-07-24 16:55:28 +03002254#ifdef CONFIG_CMD_ETHSW
2255 if (ethsw_define_functions(&vsc9953_cmd_func) < 0)
2256 debug("Unable to use \"ethsw\" commands\n");
2257#endif
2258
Codrin Ciubotariu6abe0782015-01-12 14:08:33 +02002259 printf("VSC9953 L2 switch initialized\n");
2260 return;
2261}