| Giulio Benetti | 6986d6b | 2020-01-10 15:51:48 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2019 |
| 4 | * Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com> |
| 5 | */ |
| 6 | |
| 7 | #define __ASSEMBLY__ |
| 8 | #include <config.h> |
| 9 | |
| 10 | /* image version */ |
| 11 | |
| 12 | IMAGE_VERSION 2 |
| 13 | |
| 14 | /* |
| 15 | * Boot Device : one of |
| 16 | * spi/sd/nand/onenand, qspi/nor |
| 17 | */ |
| 18 | |
| 19 | BOOT_FROM sd |
| 20 | |
| 21 | /* |
| 22 | * Device Configuration Data (DCD) |
| 23 | * |
| 24 | * Each entry must have the format: |
| 25 | * Addr-type Address Value |
| 26 | * |
| 27 | * where: |
| 28 | * Addr-type register length (1,2 or 4 bytes) |
| 29 | * Address absolute address of the register |
| 30 | * value value to be stored in the register |
| 31 | */ |
| 32 | |
| 33 | /* Set all FlexRAM as OCRAM(01b) */ |
| 34 | DATA 4 0x400AC044 0x55555555 |
| 35 | /* Use FLEXRAM_BANK_CFG to config FlexRAM */ |
| 36 | SET_BIT 4 0x400AC040 0x4 |