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Vikas Manocha33913c52014-11-18 10:42:22 -08001/*
2 * (C) Copyright 2014
3 * Vikas Manocha, STMicroelectronics, <vikas.manocha@st.com>
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8#ifndef __CONFIG_STV0991_H
9#define __CONFIG_STV0991_H
Vikas Manocha33913c52014-11-18 10:42:22 -080010#define CONFIG_SYS_DCACHE_OFF
Vikas Manocha33913c52014-11-18 10:42:22 -080011#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
Vikas Manocha32b9e712014-11-18 10:42:23 -080012
Vikas Manocha33913c52014-11-18 10:42:22 -080013#define CONFIG_SYS_CORTEX_R4
14
Vikas Manocha33913c52014-11-18 10:42:22 -080015/* ram memory-related information */
16#define CONFIG_NR_DRAM_BANKS 1
17#define PHYS_SDRAM_1 0x00000000
18#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
19#define PHYS_SDRAM_1_SIZE 0x00198000
20
21#define CONFIG_ENV_SIZE 0x10000
Vikas Manochaf6533532015-07-02 18:29:37 -070022#define CONFIG_ENV_IS_IN_SPI_FLASH
23#define CONFIG_ENV_SECT_SIZE CONFIG_ENV_SIZE
24#define CONFIG_ENV_OFFSET 0x30000
Vikas Manocha33913c52014-11-18 10:42:22 -080025#define CONFIG_ENV_ADDR \
26 (PHYS_SDRAM_1_SIZE - CONFIG_ENV_SIZE)
27#define CONFIG_SYS_MAXARGS 16
28#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 16 * 1024)
29
30/* serial port (PL011) configuration */
Vikas Manocha0860b6a2014-12-01 12:27:54 -080031#define CONFIG_PL01X_SERIAL
Vikas Manocha33913c52014-11-18 10:42:22 -080032
33/* user interface */
Vikas Manocha7f34a692014-11-18 10:42:24 -080034#define CONFIG_SYS_CBSIZE 1024
Vikas Manocha33913c52014-11-18 10:42:22 -080035#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
36 +sizeof(CONFIG_SYS_PROMPT) + 16)
37
38/* MISC */
39#define CONFIG_SYS_LOAD_ADDR 0x00000000
Vikas Manochad70864c2014-12-01 12:27:53 -080040#define CONFIG_SYS_INIT_RAM_SIZE 0x8000
Vikas Manocha33913c52014-11-18 10:42:22 -080041#define CONFIG_SYS_INIT_RAM_ADDR 0x00190000
42#define CONFIG_SYS_INIT_SP_OFFSET \
43 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Bin Meng75574052016-02-05 19:30:11 -080044/* U-Boot Load Address */
Vikas Manocha33913c52014-11-18 10:42:22 -080045#define CONFIG_SYS_TEXT_BASE 0x00010000
46#define CONFIG_SYS_INIT_SP_ADDR \
47 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
48
Vikas Manocha32b9e712014-11-18 10:42:23 -080049/* GMAC related configs */
50
51#define CONFIG_MII
Vikas Manocha32b9e712014-11-18 10:42:23 -080052#define CONFIG_DW_ALTDESCRIPTOR
53#define CONFIG_PHY_MICREL
54
55/* Command support defines */
Vikas Manocha32b9e712014-11-18 10:42:23 -080056#define CONFIG_PHY_RESET_DELAY 10000 /* in usec */
57
Vikas Manocha7f34a692014-11-18 10:42:24 -080058#define CONFIG_SYS_MEMTEST_START 0x0000
59#define CONFIG_SYS_MEMTEST_END 1024*1024
Vikas Manocha7f34a692014-11-18 10:42:24 -080060
61/* Misc configuration */
62#define CONFIG_SYS_LONGHELP
63#define CONFIG_CMDLINE_EDITING
64
Vikas Manocha7f34a692014-11-18 10:42:24 -080065#define CONFIG_BOOTCOMMAND "go 0x40040000"
Stefan Roese83da3f12015-05-18 14:08:23 +020066
Vikas Manocha8cc062f2015-07-02 18:29:41 -070067/*
68+ * QSPI support
69+ */
70#ifdef CONFIG_OF_CONTROL /* QSPI is controlled via DT */
Vikas Manocha8cc062f2015-07-02 18:29:41 -070071#define CONFIG_CQSPI_DECODER 0
72#define CONFIG_CQSPI_REF_CLK ((30/4)/2)*1000*1000
Vignesh R4f06bf22016-12-21 10:42:32 +053073#define CONFIG_BOUNCE_BUFFER
Vikas Manocha8cc062f2015-07-02 18:29:41 -070074
Vikas Manocha8cc062f2015-07-02 18:29:41 -070075#endif
76
Vikas Manocha33913c52014-11-18 10:42:22 -080077#endif /* __CONFIG_H */