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Fabio Estevam77e62892012-09-13 03:18:20 +00001/*
2 * Copyright (C) 2012 Freescale Semiconductor, Inc.
3 *
4 * Configuration settings for the Freescale i.MX6Q SabreSD board.
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Fabio Estevam77e62892012-09-13 03:18:20 +00007 */
8
Fabio Estevamc5ca8972012-09-24 08:09:32 +00009#ifndef __MX6QSABRESD_CONFIG_H
10#define __MX6QSABRESD_CONFIG_H
Fabio Estevam77e62892012-09-13 03:18:20 +000011
John Tobias7706eae2014-11-12 14:27:44 -080012#ifdef CONFIG_SPL
John Tobias7706eae2014-11-12 14:27:44 -080013#include "imx6_spl.h"
14#endif
15
Fabio Estevam77e62892012-09-13 03:18:20 +000016#define CONFIG_MACH_TYPE 3980
Fabio Estevamc5ca8972012-09-24 08:09:32 +000017#define CONFIG_MXC_UART_BASE UART1_BASE
Simon Glass4694a742016-10-17 20:12:39 -060018#define CONSOLE_DEV "ttymxc0"
Otavio Salvadorc0bfaab2012-10-02 09:22:10 +000019#define CONFIG_MMCROOT "/dev/mmcblk1p2"
Fabio Estevam77e62892012-09-13 03:18:20 +000020
Otavio Salvador134629c2014-01-06 13:27:20 -020021#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
22
Pierre Aubertec10aed2013-06-04 09:00:15 +020023#include "mx6sabre_common.h"
Otavio Salvador1c0b9be2012-09-26 11:37:01 +000024
Diego Dorta466016e2016-10-11 11:09:27 -030025/* Falcon Mode */
Tom Rini133b2e22017-01-20 19:55:53 -050026#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
27#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
Diego Dorta466016e2016-10-11 11:09:27 -030028#define CONFIG_CMD_SPL
Diego Dorta466016e2016-10-11 11:09:27 -030029#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
30#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
31
32/* Falcon Mode - MMC support: args@1MB kernel@2MB */
33#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
34#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512)
35#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */
36
Shawn Guo7e5e8332012-12-30 14:14:59 +000037#define CONFIG_SYS_FSL_USDHC_NUM 3
38#if defined(CONFIG_ENV_IS_IN_MMC)
Fabio Estevam3cce37d2013-01-10 09:00:53 +000039#define CONFIG_SYS_MMC_ENV_DEV 1 /* SDHC3 */
Shawn Guo7e5e8332012-12-30 14:14:59 +000040#endif
41
Marek Vasut0e99f012014-03-23 22:45:41 +010042#define CONFIG_CMD_PCI
43#ifdef CONFIG_CMD_PCI
Marek Vasut0e99f012014-03-23 22:45:41 +010044#define CONFIG_PCI_SCAN_SHOW
45#define CONFIG_PCIE_IMX
46#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
47#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
48#endif
49
Fabio Estevamba92ad62014-05-09 13:15:42 -030050/* I2C Configs */
Fabio Estevamba92ad62014-05-09 13:15:42 -030051#define CONFIG_SYS_I2C
52#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +020053#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
54#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -070055#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Fabio Estevamba92ad62014-05-09 13:15:42 -030056#define CONFIG_SYS_I2C_SPEED 100000
57
58/* PMIC */
59#define CONFIG_POWER
60#define CONFIG_POWER_I2C
61#define CONFIG_POWER_PFUZE100
62#define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
63
Peng Fanc9498fa2014-12-02 09:55:27 +080064/* USB Configs */
Peng Fanc9498fa2014-12-02 09:55:27 +080065#ifdef CONFIG_CMD_USB
Peng Fanc9498fa2014-12-02 09:55:27 +080066#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
67#define CONFIG_USB_HOST_ETHER
68#define CONFIG_USB_ETHER_ASIX
69#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
70#define CONFIG_MXC_USB_FLAGS 0
71#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 /* Enabled USB controller number */
72#endif
73
Fabio Estevamc5ca8972012-09-24 08:09:32 +000074#endif /* __MX6QSABRESD_CONFIG_H */