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Heiko Schocherdc5f4e42007-02-16 07:57:42 +01001/*
2 * (C) Copyright 2007
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
Heiko Schocherdc5f4e42007-02-16 07:57:42 +01006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
11/*
12 * High Level Configuration Options
13 * (easy to change)
14 */
15
Masahiro Yamada608ed2c2014-01-16 11:03:07 +090016#define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010017#define CONFIG_JUPITER 1 /* ... on Jupiter board */
18
Wolfgang Denk291ba1b2010-10-06 09:05:45 +020019/*
20 * Valid values for CONFIG_SYS_TEXT_BASE are:
21 * 0xFFF00000 boot high (standard configuration)
22 * 0x00100000 boot from RAM (for testing only)
23 */
24#ifndef CONFIG_SYS_TEXT_BASE
25#define CONFIG_SYS_TEXT_BASE 0xFFF00000
26#endif
27
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020028#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010029
30#define CONFIG_BOARD_EARLY_INIT_R 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010031
Becky Bruce03ea1be2008-05-08 19:02:12 -050032#define CONFIG_HIGH_BATS 1 /* High BATs supported */
33
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010034/*
35 * Serial console configuration
36 */
37#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020038#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010039
40/*
41 * PCI Mapping:
42 * 0x40000000 - 0x4fffffff - PCI Memory
43 * 0x50000000 - 0x50ffffff - PCI IO Space
44 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010045
46#if defined(CONFIG_PCI)
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010047#define CONFIG_PCI_SCAN_SHOW 1
TsiChung Liew521f97b2008-03-30 01:19:06 -050048#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010049
50#define CONFIG_PCI_MEM_BUS 0x40000000
51#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
52#define CONFIG_PCI_MEM_SIZE 0x10000000
53
54#define CONFIG_PCI_IO_BUS 0x50000000
55#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
56#define CONFIG_PCI_IO_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010057#endif
58
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020059#define CONFIG_SYS_XLB_PIPELINING 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010060
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010061#define CONFIG_MII 1
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020062#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010063
64/* Partitions */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010065
66#define CONFIG_TIMESTAMP /* Print image info with timestamp */
67
68/*
Jon Loeliger140b69c2007-07-10 09:38:02 -050069 * BOOTP options
70 */
71#define CONFIG_BOOTP_BOOTFILESIZE
72#define CONFIG_BOOTP_BOOTPATH
73#define CONFIG_BOOTP_GATEWAY
74#define CONFIG_BOOTP_HOSTNAME
75
Jon Loeliger140b69c2007-07-10 09:38:02 -050076/*
Jon Loeligerca8b5662007-07-04 22:32:51 -050077 * Command line configuration.
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010078 */
Jon Loeligerca8b5662007-07-04 22:32:51 -050079
Jon Loeliger140b69c2007-07-10 09:38:02 -050080#if defined(CONFIG_PCI)
81#define CODFIG_CMD_PCI
82#endif
83
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010084/*
85 * Autobooting
86 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010087
88#define CONFIG_PREBOOT "echo;" \
Wolfgang Denk1baed662008-03-03 12:16:44 +010089 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +010090 "echo"
91
92#undef CONFIG_BOOTARGS
93
94#define CONFIG_EXTRA_ENV_SETTINGS \
95 "netdev=eth0\0" \
96 "nfsargs=setenv bootargs root=/dev/nfs rw " \
97 "nfsroot=${serverip}:${rootpath}\0" \
98 "ramargs=setenv bootargs root=/dev/ram rw\0" \
99 "addip=setenv bootargs ${bootargs} " \
100 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
101 ":${hostname}:${netdev}:off panic=1\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100102 "flash_nfs=run nfsargs addip addcons;" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100103 "bootm ${kernel_addr}\0" \
104 "flash_self=run ramargs addip;" \
105 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100106 "addcons=setenv bootargs ${bootargs} console=${contyp}," \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100107 "${baudrate}\0" \
108 "contyp=ttyS0\0" \
Wolfgang Denk7108f362007-03-13 16:05:55 +0100109 "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
Heiko Schocher162bbec2007-03-13 09:40:59 +0100110 "bootm\0" \
111 "rootpath=/opt/eldk/ppc_6xx\0" \
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100112 "bootfile=/tftpboot/jupiter/uImage\0" \
113 ""
114
115#define CONFIG_BOOTCOMMAND "run flash_self"
116
117/*
118 * IPB Bus clocking configuration.
119 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200120#undef CONFIG_SYS_IPBSPEED_133 /* define for 133MHz speed */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100121
122#if 0
123/* pass open firmware flat tree */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100124#define OF_CPU "PowerPC,5200@0"
125#define OF_SOC "soc5200@f0000000"
126#define OF_TBCLK (bd->bi_busfreq / 8)
127#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
128#endif
129
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100130/*
131 * Flash configuration
132 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200133#define CONFIG_SYS_FLASH_BASE 0xFF000000
134#define CONFIG_SYS_FLASH_SIZE 0x01000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100135
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200136#define CONFIG_SYS_MAX_FLASH_SECT 128 /* max num of sects on one chip */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100137
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200138#define CONFIG_ENV_ADDR (CONFIG_SYS_TEXT_BASE + 0x40000) /* third sector */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100139
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
141#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100142
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200143#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100144
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200145#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200146#define CONFIG_SYS_FLASH_CFI
147#define CONFIG_SYS_FLASH_EMPTY_INFO
148#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
149#define CONFIG_SYS_UPDATE_FLASH_SIZE 1
150#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100151
152/*
153 * Environment settings
154 */
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200155#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200156#define CONFIG_ENV_SIZE 0x20000
157#define CONFIG_ENV_SECT_SIZE 0x20000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100158#define CONFIG_ENV_OVERWRITE 1
159
Heiko Schocher162bbec2007-03-13 09:40:59 +0100160/* Address and size of Redundant Environment Sector */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200161#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
162#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
Heiko Schocher162bbec2007-03-13 09:40:59 +0100163
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100164/*
165 * Memory map
166 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200167#define CONFIG_SYS_MBAR 0xF0000000
168#define CONFIG_SYS_SDRAM_BASE 0x00000000
169#define CONFIG_SYS_DEFAULT_MBAR 0x80000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100170
171/* Use SRAM until RAM will be available */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200172#define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
Wolfgang Denk1c2e98e2010-10-26 13:32:32 +0200173#define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* Size of used area in DPRAM */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100174
Wolfgang Denk0191e472010-10-26 14:34:52 +0200175#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200176#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100177
Wolfgang Denk0708bc62010-10-07 21:51:12 +0200178#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
180# define CONFIG_SYS_RAMBOOT 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100181#endif
182
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200183#define CONFIG_SYS_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
184#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
185#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100186
187/*
188 * Ethernet configuration
189 */
190#define CONFIG_MPC5xxx_FEC 1
Ben Warrenbc1b9172009-02-05 23:58:25 -0800191#define CONFIG_MPC5xxx_FEC_MII100
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100192/*
Ben Warrenbc1b9172009-02-05 23:58:25 -0800193 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100194 */
Ben Warrenbc1b9172009-02-05 23:58:25 -0800195/* #define CONFIG_MPC5xxx_FEC_MII10 */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100196#define CONFIG_PHY_ADDR 0x00
197
198/*
199 * GPIO configuration
200 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200201#define CONFIG_SYS_GPS_PORT_CONFIG 0x10000004
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100202
203/*
204 * Miscellaneous configurable options
205 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200206#define CONFIG_SYS_LONGHELP /* undef to save memory */
Heiko Schocher162bbec2007-03-13 09:40:59 +0100207
208#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500209#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200210#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100211#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200212#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100213#endif
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
215#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
216#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100217
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200218#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
219#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
220#define CONFIG_SYS_ALT_MEMTEST 1
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100221
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200222#define CONFIG_SYS_LOAD_ADDR 0x200000 /* default load address */
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100223
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200224#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500225#if defined(CONFIG_CMD_KGDB)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200226# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
Jon Loeligerca8b5662007-07-04 22:32:51 -0500227#endif
228
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100229/*
230 * Various low-level settings
231 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200232#define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
233#define CONFIG_SYS_HID0_FINAL HID0_ICE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100234
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200235#define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
236#define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
237#define CONFIG_SYS_BOOTCS_CFG 0x00047801
238#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
239#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100240
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200241#define CONFIG_SYS_CS_BURST 0x00000000
242#define CONFIG_SYS_CS_DEADCYCLE 0x33333333
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100243
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200244#define CONFIG_SYS_RESET_ADDRESS 0xff000000
Heiko Schocherdc5f4e42007-02-16 07:57:42 +0100245
246#endif /* __CONFIG_H */