| Álvaro Fernández Rojas | 92da83d | 2017-05-16 18:39:03 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <dt-bindings/clock/bcm6348-clock.h> |
| 8 | #include <dt-bindings/gpio/gpio.h> |
| 9 | #include <dt-bindings/reset/bcm6348-reset.h> |
| 10 | #include "skeleton.dtsi" |
| 11 | |
| 12 | / { |
| 13 | compatible = "brcm,bcm6348"; |
| 14 | |
| 15 | cpus { |
| 16 | reg = <0xfffe0000 0x4>; |
| 17 | #address-cells = <1>; |
| 18 | #size-cells = <0>; |
| 19 | u-boot,dm-pre-reloc; |
| 20 | |
| 21 | cpu@0 { |
| 22 | compatible = "brcm,bcm6348-cpu", "mips,mips4Kc"; |
| 23 | device_type = "cpu"; |
| 24 | reg = <0>; |
| 25 | u-boot,dm-pre-reloc; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | clocks { |
| 30 | compatible = "simple-bus"; |
| 31 | #address-cells = <1>; |
| 32 | #size-cells = <1>; |
| 33 | u-boot,dm-pre-reloc; |
| 34 | |
| 35 | periph_osc: periph-osc { |
| 36 | compatible = "fixed-clock"; |
| 37 | #clock-cells = <0>; |
| 38 | clock-frequency = <50000000>; |
| 39 | u-boot,dm-pre-reloc; |
| 40 | }; |
| 41 | |
| 42 | periph_clk: periph-clk { |
| 43 | compatible = "brcm,bcm6345-clk"; |
| 44 | reg = <0xfffe0004 0x4>; |
| 45 | #clock-cells = <1>; |
| 46 | }; |
| 47 | }; |
| 48 | |
| 49 | pflash: nor@1fc00000 { |
| 50 | compatible = "cfi-flash"; |
| 51 | reg = <0x1fc00000 0x2000000>; |
| 52 | bank-width = <2>; |
| 53 | #address-cells = <1>; |
| 54 | #size-cells = <1>; |
| 55 | |
| 56 | status = "disabled"; |
| 57 | }; |
| 58 | |
| 59 | ubus { |
| 60 | compatible = "simple-bus"; |
| 61 | #address-cells = <1>; |
| 62 | #size-cells = <1>; |
| 63 | u-boot,dm-pre-reloc; |
| 64 | |
| 65 | pll_cntl: syscon@fffe0008 { |
| 66 | compatible = "syscon"; |
| 67 | reg = <0xfffe0008 0x4>; |
| 68 | }; |
| 69 | |
| 70 | syscon-reboot { |
| 71 | compatible = "syscon-reboot"; |
| 72 | regmap = <&pll_cntl>; |
| 73 | offset = <0x0>; |
| 74 | mask = <0x1>; |
| 75 | }; |
| 76 | |
| 77 | periph_rst: reset-controller@fffe0028 { |
| 78 | compatible = "brcm,bcm6345-reset"; |
| 79 | reg = <0xfffe0028 0x4>; |
| 80 | #reset-cells = <1>; |
| 81 | }; |
| 82 | |
| 83 | wdt: watchdog@fffe021c { |
| 84 | compatible = "brcm,bcm6345-wdt"; |
| 85 | reg = <0xfffe021c 0xc>; |
| 86 | clocks = <&periph_osc>; |
| 87 | }; |
| 88 | |
| 89 | wdt-reboot { |
| 90 | compatible = "wdt-reboot"; |
| 91 | wdt = <&wdt>; |
| 92 | }; |
| 93 | |
| 94 | uart0: serial@fffe0300 { |
| 95 | compatible = "brcm,bcm6345-uart"; |
| 96 | reg = <0xfffe0300 0x18>; |
| 97 | clocks = <&periph_osc>; |
| 98 | |
| 99 | status = "disabled"; |
| 100 | }; |
| 101 | |
| 102 | gpio1: gpio-controller@fffe0400 { |
| 103 | compatible = "brcm,bcm6345-gpio"; |
| 104 | reg = <0xfffe0400 0x4>, <0xfffe0408 0x4>; |
| 105 | gpio-controller; |
| 106 | #gpio-cells = <2>; |
| 107 | ngpios = <5>; |
| 108 | |
| 109 | status = "disabled"; |
| 110 | }; |
| 111 | |
| 112 | gpio0: gpio-controller@fffe0404 { |
| 113 | compatible = "brcm,bcm6345-gpio"; |
| 114 | reg = <0xfffe0404 0x4>, <0xfffe040c 0x4>; |
| 115 | gpio-controller; |
| 116 | #gpio-cells = <2>; |
| 117 | |
| 118 | status = "disabled"; |
| 119 | }; |
| 120 | |
| 121 | memory-controller@fffe2300 { |
| 122 | compatible = "brcm,bcm6338-mc"; |
| 123 | reg = <0xfffe2300 0x38>; |
| 124 | u-boot,dm-pre-reloc; |
| 125 | }; |
| 126 | }; |
| 127 | }; |