Blame - arch/arm/mach-tegra/tegra20/Kconfig - filogic/uboot

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Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	1	if TEGRA20
				2
Tom Rini	117af43	2022-11-19 18:45:36 -0500	[diff] [blame]	3	config TEGRA_LP0
				4	bool
				5	select TEGRA_CLOCK_SCALING
				6
				7	config TEGRA_PMU
				8	bool
				9
				10	config TEGRA_CLOCK_SCALING
				11	bool
				12
Tom Rini	4b3e7c0	2022-12-02 16:42:45 -0500	[diff] [blame]	13	config TEGRA_UARTA_GPU
				14	bool
				15
				16	config TEGRA_UARTA_SDIO1
				17	bool
				18
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	19	choice
				20	prompt "Tegra20 board select"
Joe Hershberger	f069960	2015-05-12 14:46:23 -0500	[diff] [blame]	21	optional
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	22
				23	config TARGET_HARMONY
				24	bool "NVIDIA Tegra20 Harmony evaluation board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	25	select BOARD_LATE_INIT
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	26
				27	config TARGET_MEDCOM_WIDE
				28	bool "Avionic Design Medcom-Wide board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	29	select BOARD_LATE_INIT
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	30
				31	config TARGET_PAZ00
				32	bool "Paz00 board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	33	select BOARD_LATE_INIT
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	34
				35	config TARGET_PLUTUX
				36	bool "Avionic Design Plutux board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	37	select BOARD_LATE_INIT
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	38
				39	config TARGET_SEABOARD
				40	bool "NVIDIA Seaboard"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	41	select BOARD_LATE_INIT
Tom Rini	117af43	2022-11-19 18:45:36 -0500	[diff] [blame]	42	select TEGRA_LP0
				43	select TEGRA_PMU
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	44
				45	config TARGET_TEC
				46	bool "Avionic Design Tamonten Evaluation Carrier"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	47	select BOARD_LATE_INIT
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	48
				49	config TARGET_TRIMSLICE
				50	bool "Compulab TrimSlice board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	51	select BOARD_LATE_INIT
Tom Rini	4b3e7c0	2022-12-02 16:42:45 -0500	[diff] [blame]	52	select TEGRA_UARTA_GPU
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	53
				54	config TARGET_VENTANA
				55	bool "NVIDIA Tegra20 Ventana evaluation board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	56	select BOARD_LATE_INIT
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	57
Marcel Ziswiler	cad18b8	2015-03-26 01:31:54 +0100	[diff] [blame]	58	config TARGET_COLIBRI_T20
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	59	bool "Toradex Colibri T20 board"
Tom Rini	22d567e	2017-01-22 19:43:11 -0500	[diff] [blame]	60	select BOARD_LATE_INIT
Tom Rini	4b3e7c0	2022-12-02 16:42:45 -0500	[diff] [blame]	61	select TEGRA_UARTA_SDIO1
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	62
				63	endchoice
				64
				65	config SYS_SOC
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	66	default "tegra20"
				67
				68	source "board/nvidia/harmony/Kconfig"
				69	source "board/avionic-design/medcom-wide/Kconfig"
				70	source "board/compal/paz00/Kconfig"
				71	source "board/avionic-design/plutux/Kconfig"
				72	source "board/nvidia/seaboard/Kconfig"
				73	source "board/avionic-design/tec/Kconfig"
				74	source "board/compulab/trimslice/Kconfig"
				75	source "board/nvidia/ventana/Kconfig"
Marcel Ziswiler	cad18b8	2015-03-26 01:31:54 +0100	[diff] [blame]	76	source "board/toradex/colibri_t20/Kconfig"
Masahiro Yamada	73a5b1a	2014-08-31 07:10:56 +0900	[diff] [blame]	77
				78	endif