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git01.mediatek.com / filogic / uboot / 1d9e7b89955a231fc10ff5332e7ed048d1c05cb7 / . / dts / upstream / Bindings / thermal / mediatek,lvts-thermal.yaml
blob: 331cf4e662e3094b9122f4cbbb27d55e1c493079 [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
8
9maintainers:
10 - Balsam CHIHI <bchihi@baylibre.com>
11
12description: |
13 LVTS is a thermal management architecture composed of three subsystems,
14 a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
15 a Converter - Low Voltage Thermal Sensor converter (LVTS), and
16 a Digital controller (LVTS_CTRL).
17
18properties:
19 compatible:
20 enum:
21 - mediatek,mt7988-lvts-ap
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]22 - mediatek,mt8186-lvts
23 - mediatek,mt8188-lvts-ap
24 - mediatek,mt8188-lvts-mcu
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]25 - mediatek,mt8192-lvts-ap
26 - mediatek,mt8192-lvts-mcu
27 - mediatek,mt8195-lvts-ap
28 - mediatek,mt8195-lvts-mcu
29
30 reg:
31 maxItems: 1
32
33 interrupts:
34 maxItems: 1
35
36 clocks:
37 maxItems: 1
38
39 resets:
40 maxItems: 1
41 description: LVTS reset for clearing temporary data on AP/MCU.
42
43 nvmem-cells:
44 minItems: 1
45 items:
46 - description: Calibration eFuse data 1 for LVTS
47 - description: Calibration eFuse data 2 for LVTS
48
49 nvmem-cell-names:
50 minItems: 1
51 items:
52 - const: lvts-calib-data-1
53 - const: lvts-calib-data-2
54
55 "#thermal-sensor-cells":
56 const: 1
57
58allOf:
59 - $ref: thermal-sensor.yaml#
60
61 - if:
62 properties:
63 compatible:
64 contains:
65 enum:
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]66 - mediatek,mt8188-lvts-ap
67 - mediatek,mt8188-lvts-mcu
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]68 - mediatek,mt8192-lvts-ap
69 - mediatek,mt8192-lvts-mcu
70 then:
71 properties:
72 nvmem-cells:
73 maxItems: 1
74
75 nvmem-cell-names:
76 maxItems: 1
77
78 - if:
79 properties:
80 compatible:
81 contains:
82 enum:
Tom Rini762f85b2024-07-20 11:15:10 -0600[diff] [blame]83 - mediatek,mt8186-lvts
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]84 - mediatek,mt8195-lvts-ap
85 - mediatek,mt8195-lvts-mcu
86 then:
87 properties:
88 nvmem-cells:
89 minItems: 2
90
91 nvmem-cell-names:
92 minItems: 2
93
94required:
95 - compatible
96 - reg
97 - interrupts
98 - clocks
99 - resets
100 - nvmem-cells
101 - nvmem-cell-names
102 - "#thermal-sensor-cells"
103
104additionalProperties: false
105
106examples:
107 - |
108 #include <dt-bindings/interrupt-controller/arm-gic.h>
109 #include <dt-bindings/clock/mt8195-clk.h>
110 #include <dt-bindings/reset/mt8195-resets.h>
111 #include <dt-bindings/thermal/mediatek,lvts-thermal.h>
112
113 soc {
114 #address-cells = <2>;
115 #size-cells = <2>;
116
117 lvts_mcu: thermal-sensor@11278000 {
118 compatible = "mediatek,mt8195-lvts-mcu";
119 reg = <0 0x11278000 0 0x1000>;
120 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH 0>;
121 clocks = <&infracfg_ao CLK_INFRA_AO_THERM>;
122 resets = <&infracfg_ao MT8195_INFRA_RST4_THERM_CTRL_MCU_SWRST>;
123 nvmem-cells = <&lvts_efuse_data1 &lvts_efuse_data2>;
124 nvmem-cell-names = "lvts-calib-data-1", "lvts-calib-data-2";
125 #thermal-sensor-cells = <1>;
126 };
127 };
128
129 thermal_zones: thermal-zones {
130 cpu0-thermal {
131 polling-delay = <1000>;
132 polling-delay-passive = <250>;
133 thermal-sensors = <&lvts_mcu MT8195_MCU_LITTLE_CPU0>;
134
135 trips {
136 cpu0_alert: trip-alert {
137 temperature = <85000>;
138 hysteresis = <2000>;
139 type = "passive";
140 };
141
142 cpu0_crit: trip-crit {
143 temperature = <100000>;
144 hysteresis = <2000>;
145 type = "critical";
146 };
147 };
148 };
149 };