Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 1d9e7b89955a231fc10ff5332e7ed048d1c05cb7 / . / dts / upstream / Bindings / mtd / st,stm32-fmc2-nand.yaml
blob: b8ef9ba88e92a5f91193f9d1286c882b10d2a42c [file] [log] [blame]
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics Flexible Memory Controller 2 (FMC2)
8
9maintainers:
10 - Christophe Kerello <christophe.kerello@foss.st.com>
11
12properties:
13 compatible:
14 enum:
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]17 - st,stm32mp25-fmc2-nfc
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]18
19 reg:
20 minItems: 6
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]21 maxItems: 12
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]22
23 interrupts:
24 maxItems: 1
25
26 dmas:
27 items:
28 - description: tx DMA channel
29 - description: rx DMA channel
30 - description: ecc DMA channel
31
32 dma-names:
33 items:
34 - const: tx
35 - const: rx
36 - const: ecc
37
38patternProperties:
39 "^nand@[a-f0-9]$":
40 type: object
41 $ref: raw-nand-chip.yaml
42 properties:
43 nand-ecc-step-size:
44 const: 512
45
46 nand-ecc-strength:
47 enum: [1, 4, 8]
48
49 unevaluatedProperties: false
50
51allOf:
52 - $ref: nand-controller.yaml#
53
54 - if:
55 properties:
56 compatible:
57 contains:
58 const: st,stm32mp15-fmc2
59 then:
60 properties:
61 reg:
62 items:
63 - description: Registers
64 - description: Chip select 0 data
65 - description: Chip select 0 command
66 - description: Chip select 0 address space
67 - description: Chip select 1 data
68 - description: Chip select 1 command
69 - description: Chip select 1 address space
70
71 clocks:
72 maxItems: 1
73
74 resets:
75 maxItems: 1
76
77 required:
78 - clocks
79
80 - if:
81 properties:
82 compatible:
83 contains:
84 const: st,stm32mp1-fmc2-nfc
85 then:
86 properties:
87 reg:
88 items:
89 - description: Chip select 0 data
90 - description: Chip select 0 command
91 - description: Chip select 0 address space
92 - description: Chip select 1 data
93 - description: Chip select 1 command
94 - description: Chip select 1 address space
95
Tom Rini6bb92fc2024-05-20 09:54:58 -0600[diff] [blame]96 - if:
97 properties:
98 compatible:
99 contains:
100 const: st,stm32mp25-fmc2-nfc
101 then:
102 properties:
103 reg:
104 items:
105 - description: Chip select 0 data
106 - description: Chip select 0 command
107 - description: Chip select 0 address space
108 - description: Chip select 1 data
109 - description: Chip select 1 command
110 - description: Chip select 1 address space
111 - description: Chip select 2 data
112 - description: Chip select 2 command
113 - description: Chip select 2 address space
114 - description: Chip select 3 data
115 - description: Chip select 3 command
116 - description: Chip select 3 address space
117
Tom Rini53633a82024-02-29 12:33:36 -0500[diff] [blame]118required:
119 - compatible
120 - reg
121 - interrupts
122
123unevaluatedProperties: false
124
125examples:
126 - |
127 #include <dt-bindings/interrupt-controller/arm-gic.h>
128 #include <dt-bindings/clock/stm32mp1-clks.h>
129 #include <dt-bindings/reset/stm32mp1-resets.h>
130
131 nand-controller@58002000 {
132 compatible = "st,stm32mp15-fmc2";
133 reg = <0x58002000 0x1000>,
134 <0x80000000 0x1000>,
135 <0x88010000 0x1000>,
136 <0x88020000 0x1000>,
137 <0x81000000 0x1000>,
138 <0x89010000 0x1000>,
139 <0x89020000 0x1000>;
140 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
141 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
142 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
143 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
144 dma-names = "tx", "rx", "ecc";
145 clocks = <&rcc FMC_K>;
146 resets = <&rcc FMC_R>;
147 #address-cells = <1>;
148 #size-cells = <0>;
149
150 nand@0 {
151 reg = <0>;
152 nand-on-flash-bbt;
153 #address-cells = <1>;
154 #size-cells = <1>;
155 };
156 };
157
158...