| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/clock/samsung,exynos4412-isp-clock.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: Samsung Exynos4412 SoC ISP clock controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Chanwoo Choi <cw00.choi@samsung.com> |
| 11 | - Krzysztof Kozlowski <krzk@kernel.org> |
| 12 | - Sylwester Nawrocki <s.nawrocki@samsung.com> |
| 13 | - Tomasz Figa <tomasz.figa@gmail.com> |
| 14 | |
| 15 | description: | |
| 16 | Clock controller for Samsung Exynos4412 SoC FIMC-ISP (Camera ISP) |
| 17 | All available clocks are defined as preprocessor macros in |
| 18 | dt-bindings/clock/ headers. |
| 19 | |
| 20 | properties: |
| 21 | compatible: |
| 22 | const: samsung,exynos4412-isp-clock |
| 23 | |
| 24 | clocks: |
| 25 | items: |
| 26 | - description: CLK_ACLK200 from the main clock controller |
| 27 | - description: CLK_ACLK400_MCUISP from the main clock controller |
| 28 | |
| 29 | clock-names: |
| 30 | items: |
| 31 | - const: aclk200 |
| 32 | - const: aclk400_mcuisp |
| 33 | |
| 34 | "#clock-cells": |
| 35 | const: 1 |
| 36 | |
| 37 | power-domains: |
| 38 | maxItems: 1 |
| 39 | |
| 40 | reg: |
| 41 | maxItems: 1 |
| 42 | |
| 43 | required: |
| 44 | - compatible |
| 45 | - "#clock-cells" |
| 46 | - clocks |
| 47 | - clock-names |
| 48 | - power-domains |
| 49 | - reg |
| 50 | |
| 51 | additionalProperties: false |
| 52 | |
| 53 | examples: |
| 54 | - | |
| 55 | #include <dt-bindings/clock/exynos4.h> |
| 56 | clock-controller@10048000 { |
| 57 | compatible = "samsung,exynos4412-isp-clock"; |
| 58 | reg = <0x10048000 0x1000>; |
| 59 | #clock-cells = <1>; |
| 60 | power-domains = <&pd_isp>; |
| 61 | clocks = <&clock CLK_ACLK200>, <&clock CLK_ACLK400_MCUISP>; |
| 62 | clock-names = "aclk200", "aclk400_mcuisp"; |
| 63 | }; |