| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0+ |
| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 2 | # |
| 3 | # (C) Copyright 2009 |
| 4 | # Marvell Semiconductor <www.marvell.com> |
| 5 | # Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| Prafulla Wadaskar | a09bbe5 | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 6 | |
| Masahiro Yamada | 65aac04 | 2013-10-17 17:34:49 +0900 | [diff] [blame] | 7 | obj-y = cpu.o |
| Masahiro Yamada | 65aac04 | 2013-10-17 17:34:49 +0900 | [diff] [blame] | 8 | obj-y += cache.o |
| Pali Rohár | 9de447c | 2023-03-11 11:57:01 +0100 | [diff] [blame] | 9 | obj-y += lowlevel.o |
| Stefan Roese | 2cc5fad | 2014-10-22 12:13:05 +0200 | [diff] [blame] | 10 | obj-y += mpp.o |
| Albert ARIBAUD | 24698d4 | 2015-10-23 18:06:42 +0200 | [diff] [blame] | 11 | |
| 12 | # cpu.o and cache.o contain CP15 instructions which cannot be run in |
| 13 | # Thumb state, so build them for ARM state even with CONFIG_SYS_THUMB_BUILD |
| 14 | |
| 15 | CFLAGS_cpu.o := -marm |
| 16 | CFLAGS_cache.o := -marm |