Shawn Guo | ec907a0 | 2019-07-07 20:59:55 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2019 Linaro Ltd. |
| 4 | * Copyright (C) 2016 NXP Semiconductors |
| 5 | * |
| 6 | * Configuration settings for Meerkat96 board. |
| 7 | */ |
| 8 | |
| 9 | #ifndef __MEERKAT96_CONFIG_H |
| 10 | #define __MEERKAT96_CONFIG_H |
| 11 | |
| 12 | #include "mx7_common.h" |
| 13 | #include <imximage.h> |
| 14 | |
| 15 | #define PHYS_SDRAM_SIZE SZ_512M |
| 16 | |
| 17 | /* Size of malloc() pool */ |
| 18 | #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) |
| 19 | |
| 20 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| 21 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000) |
| 22 | |
| 23 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 24 | #define CONFIG_SYS_HZ 1000 |
| 25 | |
| 26 | /* Physical Memory Map */ |
| 27 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 28 | |
| 29 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 30 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 31 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 32 | |
| 33 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 34 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 35 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 36 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 37 | |
| 38 | /* Environment configs */ |
| 39 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
| 40 | #define CONFIG_SYS_MMC_ENV_PART 0 |
Shawn Guo | ec907a0 | 2019-07-07 20:59:55 +0800 | [diff] [blame] | 41 | |
| 42 | /* USB configs */ |
| 43 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 44 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 45 | |
| 46 | #endif |