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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Jason Liuf5b81c82011-05-13 01:58:55 +00002/*
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 * Jason Liu <r64343@freescale.com>
Jason Liuf5b81c82011-05-13 01:58:55 +00005 */
6
7#include <common.h>
Simon Glassa7b51302019-11-14 12:57:46 -07008#include <init.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060010#include <asm/global_data.h>
Jason Liuf5b81c82011-05-13 01:58:55 +000011#include <asm/io.h>
12#include <asm/arch/imx-regs.h>
Jason Liuf5b81c82011-05-13 01:58:55 +000013#include <asm/arch/sys_proto.h>
14#include <asm/arch/crm_regs.h>
Stefano Babic59dffd62012-02-22 00:24:41 +000015#include <asm/arch/clock.h>
Benoît Thébaudeaub66011e2013-05-03 10:32:34 +000016#include <asm/arch/iomux-mx53.h>
Jason Liuf5b81c82011-05-13 01:58:55 +000017#include <asm/arch/clock.h>
Simon Glass5e6201b2019-08-01 09:46:51 -060018#include <env.h>
Masahiro Yamada56a931c2016-09-21 11:28:55 +090019#include <linux/errno.h>
Stefano Babic33731bc2017-06-29 10:16:06 +020020#include <asm/mach-imx/mx5_video.h>
Jason Liuf5b81c82011-05-13 01:58:55 +000021#include <i2c.h>
Diego Dorta2661c9c2017-09-22 12:12:18 -030022#include <input.h>
Yangbo Lu73340382019-06-21 11:42:28 +080023#include <fsl_esdhc_imx.h>
Stefano Babic831096b2011-08-21 10:59:33 +020024#include <asm/gpio.h>
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000025#include <power/pmic.h>
Fabio Estevam2fc58322012-04-30 08:12:04 +000026#include <dialog_pmic.h>
Fabio Estevam082a1122012-05-07 10:25:59 +000027#include <fsl_pmic.h>
Fabio Estevam20c49da2012-05-10 15:07:35 +000028#include <linux/fb.h>
29#include <ipu_pixfmt.h>
30
Fabio Estevam642af862012-08-21 10:01:56 +000031#define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24)
Jason Liuf5b81c82011-05-13 01:58:55 +000032
33DECLARE_GLOBAL_DATA_PTR;
34
Fabio Estevam8b3533c2012-05-08 03:40:49 +000035u32 get_board_rev(void)
36{
37 struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
38 struct fuse_bank *bank = &iim->bank[0];
39 struct fuse_bank0_regs *fuse =
40 (struct fuse_bank0_regs *)bank->fuse_regs;
41
42 int rev = readl(&fuse->gp[6]);
43
Fabio Estevam99f896e2012-05-29 05:54:39 +000044 if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR))
45 rev = 0;
46
Fabio Estevam8b3533c2012-05-08 03:40:49 +000047 return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8;
48}
49
Benoît Thébaudeaub66011e2013-05-03 10:32:34 +000050#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
51 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
52
Jason Liuf5b81c82011-05-13 01:58:55 +000053static void setup_iomux_uart(void)
54{
Benoît Thébaudeaub66011e2013-05-03 10:32:34 +000055 static const iomux_v3_cfg_t uart_pads[] = {
56 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
57 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
58 };
Jason Liuf5b81c82011-05-13 01:58:55 +000059
Benoît Thébaudeaub66011e2013-05-03 10:32:34 +000060 imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
Jason Liuf5b81c82011-05-13 01:58:55 +000061}
62
Benoît Thébaudeaub66011e2013-05-03 10:32:34 +000063#define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \
64 PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
65
Fabio Estevam2fc58322012-04-30 08:12:04 +000066static void setup_iomux_i2c(void)
67{
Benoît Thébaudeaub66011e2013-05-03 10:32:34 +000068 static const iomux_v3_cfg_t i2c1_pads[] = {
69 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL),
70 NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL),
71 };
72
73 imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads));
Fabio Estevam2fc58322012-04-30 08:12:04 +000074}
75
76static int power_init(void)
77{
Fabio Estevam082a1122012-05-07 10:25:59 +000078 unsigned int val;
Fabio Estevamfbbdadf2012-12-28 04:05:29 +000079 int ret;
Fabio Estevam2fc58322012-04-30 08:12:04 +000080 struct pmic *p;
81
Fabio Estevam082a1122012-05-07 10:25:59 +000082 if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) {
Fabio Estevamdf5b4c32012-12-28 04:05:28 +000083 ret = pmic_dialog_init(I2C_PMIC);
84 if (ret)
85 return ret;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +000086
87 p = pmic_get("DIALOG_PMIC");
88 if (!p)
89 return -ENODEV;
Fabio Estevam2fc58322012-04-30 08:12:04 +000090
Simon Glass6a38e412017-08-03 12:22:09 -060091 env_set("fdt_file", "imx53-qsb.dtb");
Fabio Estevama68b1512014-11-10 17:38:19 -020092
Fabio Estevam082a1122012-05-07 10:25:59 +000093 /* Set VDDA to 1.25V */
94 val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V;
95 ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val);
Fabio Estevamfbbdadf2012-12-28 04:05:29 +000096 if (ret) {
97 printf("Writing to BUCKCORE_REG failed: %d\n", ret);
98 return ret;
99 }
Fabio Estevam2fc58322012-04-30 08:12:04 +0000100
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000101 pmic_reg_read(p, DA9053_SUPPLY_REG, &val);
Fabio Estevam082a1122012-05-07 10:25:59 +0000102 val |= DA9052_SUPPLY_VBCOREGO;
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000103 ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val);
104 if (ret) {
105 printf("Writing to SUPPLY_REG failed: %d\n", ret);
106 return ret;
107 }
Fabio Estevam2fc58322012-04-30 08:12:04 +0000108
Fabio Estevam082a1122012-05-07 10:25:59 +0000109 /* Set Vcc peripheral to 1.30V */
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000110 ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62);
111 if (ret) {
112 printf("Writing to BUCKPRO_REG failed: %d\n", ret);
113 return ret;
114 }
115
116 ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62);
117 if (ret) {
118 printf("Writing to SUPPLY_REG failed: %d\n", ret);
119 return ret;
120 }
121
122 return ret;
Fabio Estevam082a1122012-05-07 10:25:59 +0000123 }
124
125 if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) {
Fabio Estevamf330cec2013-11-20 21:17:36 -0200126 ret = pmic_init(I2C_0);
Fabio Estevamdf5b4c32012-12-28 04:05:28 +0000127 if (ret)
128 return ret;
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000129
Fabio Estevam39ffa1f2012-12-11 06:36:58 +0000130 p = pmic_get("FSL_PMIC");
Łukasz Majewski1c6dba12012-11-13 03:21:55 +0000131 if (!p)
132 return -ENODEV;
Fabio Estevam082a1122012-05-07 10:25:59 +0000133
Simon Glass6a38e412017-08-03 12:22:09 -0600134 env_set("fdt_file", "imx53-qsrb.dtb");
Fabio Estevama68b1512014-11-10 17:38:19 -0200135
Fabio Estevam082a1122012-05-07 10:25:59 +0000136 /* Set VDDGP to 1.25V for 1GHz on SW1 */
137 pmic_reg_read(p, REG_SW_0, &val);
138 val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708;
139 ret = pmic_reg_write(p, REG_SW_0, val);
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000140 if (ret) {
141 printf("Writing to REG_SW_0 failed: %d\n", ret);
142 return ret;
143 }
Fabio Estevam082a1122012-05-07 10:25:59 +0000144
145 /* Set VCC as 1.30V on SW2 */
146 pmic_reg_read(p, REG_SW_1, &val);
147 val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708;
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000148 ret = pmic_reg_write(p, REG_SW_1, val);
149 if (ret) {
150 printf("Writing to REG_SW_1 failed: %d\n", ret);
151 return ret;
152 }
Fabio Estevam082a1122012-05-07 10:25:59 +0000153
154 /* Set global reset timer to 4s */
155 pmic_reg_read(p, REG_POWER_CTL2, &val);
156 val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708;
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000157 ret = pmic_reg_write(p, REG_POWER_CTL2, val);
158 if (ret) {
159 printf("Writing to REG_POWER_CTL2 failed: %d\n", ret);
160 return ret;
161 }
Fabio Estevam0436b7a2012-05-07 10:26:00 +0000162
163 /* Set VUSBSEL and VUSBEN for USB PHY supply*/
164 pmic_reg_read(p, REG_MODE_0, &val);
165 val |= (VUSBSEL_MC34708 | VUSBEN_MC34708);
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000166 ret = pmic_reg_write(p, REG_MODE_0, val);
167 if (ret) {
168 printf("Writing to REG_MODE_0 failed: %d\n", ret);
169 return ret;
170 }
Fabio Estevam0436b7a2012-05-07 10:26:00 +0000171
172 /* Set SWBST to 5V in auto mode */
173 val = SWBST_AUTO;
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000174 ret = pmic_reg_write(p, SWBST_CTRL, val);
175 if (ret) {
176 printf("Writing to SWBST_CTRL failed: %d\n", ret);
177 return ret;
178 }
179
180 return ret;
Fabio Estevam082a1122012-05-07 10:25:59 +0000181 }
Fabio Estevam2fc58322012-04-30 08:12:04 +0000182
Fabio Estevamfbbdadf2012-12-28 04:05:29 +0000183 return -1;
Fabio Estevam2fc58322012-04-30 08:12:04 +0000184}
185
186static void clock_1GHz(void)
187{
188 int ret;
Benoît Thébaudeauafac1652012-09-27 10:19:58 +0000189 u32 ref_clk = MXC_HCLK;
Fabio Estevam2fc58322012-04-30 08:12:04 +0000190 /*
191 * After increasing voltage to 1.25V, we can switch
192 * CPU clock to 1GHz and DDR to 400MHz safely
193 */
194 ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK);
195 if (ret)
196 printf("CPU: Switch CPU clock to 1GHZ failed\n");
197
198 ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
199 ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
200 if (ret)
201 printf("CPU: Switch DDR clock to 400MHz failed\n");
202}
203
Jason Liuf5b81c82011-05-13 01:58:55 +0000204int board_early_init_f(void)
205{
206 setup_iomux_uart();
Vikram Narayanan8bb48d62012-11-10 02:32:46 +0000207 setup_iomux_lcd();
Jason Liuf5b81c82011-05-13 01:58:55 +0000208
209 return 0;
210}
211
Stefano Babiccbf6c9c2012-08-05 00:18:53 +0000212/*
213 * Do not overwrite the console
214 * Use always serial for U-Boot console
215 */
216int overwrite_console(void)
Fabio Estevam026c9862012-04-30 08:12:03 +0000217{
Stefano Babiccbf6c9c2012-08-05 00:18:53 +0000218 return 1;
Fabio Estevam026c9862012-04-30 08:12:03 +0000219}
Fabio Estevam026c9862012-04-30 08:12:03 +0000220
Jason Liuf5b81c82011-05-13 01:58:55 +0000221int board_init(void)
222{
Jason Liuf5b81c82011-05-13 01:58:55 +0000223 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
224
Stefano Babic59dffd62012-02-22 00:24:41 +0000225 mxc_set_sata_internal_clock();
Fabio Estevam99f896e2012-05-29 05:54:39 +0000226 setup_iomux_i2c();
Fabio Estevamb665c832012-12-26 05:50:20 +0000227
Fabio Estevamb665c832012-12-26 05:50:20 +0000228 return 0;
229}
230
231int board_late_init(void)
232{
Fabio Estevam99f896e2012-05-29 05:54:39 +0000233 if (!power_init())
234 clock_1GHz();
Stefano Babic59dffd62012-02-22 00:24:41 +0000235
Jason Liuf5b81c82011-05-13 01:58:55 +0000236 return 0;
237}
238
239int checkboard(void)
240{
241 puts("Board: MX53 LOCO\n");
242
243 return 0;
244}