Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2011 Freescale Semiconductor, Inc. |
| 4 | * Jason Liu <r64343@freescale.com> |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | #include <common.h> |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 8 | #include <init.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 9 | #include <log.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 10 | #include <asm/global_data.h> |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 11 | #include <asm/io.h> |
| 12 | #include <asm/arch/imx-regs.h> |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 13 | #include <asm/arch/sys_proto.h> |
| 14 | #include <asm/arch/crm_regs.h> |
Stefano Babic | 59dffd6 | 2012-02-22 00:24:41 +0000 | [diff] [blame] | 15 | #include <asm/arch/clock.h> |
Benoît Thébaudeau | b66011e | 2013-05-03 10:32:34 +0000 | [diff] [blame] | 16 | #include <asm/arch/iomux-mx53.h> |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 17 | #include <asm/arch/clock.h> |
Simon Glass | 5e6201b | 2019-08-01 09:46:51 -0600 | [diff] [blame] | 18 | #include <env.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 19 | #include <linux/errno.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 20 | #include <asm/mach-imx/mx5_video.h> |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 21 | #include <i2c.h> |
Diego Dorta | 2661c9c | 2017-09-22 12:12:18 -0300 | [diff] [blame] | 22 | #include <input.h> |
Yangbo Lu | 7334038 | 2019-06-21 11:42:28 +0800 | [diff] [blame] | 23 | #include <fsl_esdhc_imx.h> |
Stefano Babic | 831096b | 2011-08-21 10:59:33 +0200 | [diff] [blame] | 24 | #include <asm/gpio.h> |
Łukasz Majewski | 1c6dba1 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 25 | #include <power/pmic.h> |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 26 | #include <dialog_pmic.h> |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 27 | #include <fsl_pmic.h> |
Fabio Estevam | 20c49da | 2012-05-10 15:07:35 +0000 | [diff] [blame] | 28 | #include <linux/fb.h> |
| 29 | #include <ipu_pixfmt.h> |
| 30 | |
Fabio Estevam | 642af86 | 2012-08-21 10:01:56 +0000 | [diff] [blame] | 31 | #define MX53LOCO_LCD_POWER IMX_GPIO_NR(3, 24) |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 32 | |
| 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
Fabio Estevam | 8b3533c | 2012-05-08 03:40:49 +0000 | [diff] [blame] | 35 | u32 get_board_rev(void) |
| 36 | { |
| 37 | struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; |
| 38 | struct fuse_bank *bank = &iim->bank[0]; |
| 39 | struct fuse_bank0_regs *fuse = |
| 40 | (struct fuse_bank0_regs *)bank->fuse_regs; |
| 41 | |
| 42 | int rev = readl(&fuse->gp[6]); |
| 43 | |
Fabio Estevam | 99f896e | 2012-05-29 05:54:39 +0000 | [diff] [blame] | 44 | if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) |
| 45 | rev = 0; |
| 46 | |
Fabio Estevam | 8b3533c | 2012-05-08 03:40:49 +0000 | [diff] [blame] | 47 | return (get_cpu_rev() & ~(0xF << 8)) | (rev & 0xF) << 8; |
| 48 | } |
| 49 | |
Benoît Thébaudeau | b66011e | 2013-05-03 10:32:34 +0000 | [diff] [blame] | 50 | #define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \ |
| 51 | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) |
| 52 | |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 53 | static void setup_iomux_uart(void) |
| 54 | { |
Benoît Thébaudeau | b66011e | 2013-05-03 10:32:34 +0000 | [diff] [blame] | 55 | static const iomux_v3_cfg_t uart_pads[] = { |
| 56 | NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL), |
| 57 | NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL), |
| 58 | }; |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 59 | |
Benoît Thébaudeau | b66011e | 2013-05-03 10:32:34 +0000 | [diff] [blame] | 60 | imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads)); |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 61 | } |
| 62 | |
Benoît Thébaudeau | b66011e | 2013-05-03 10:32:34 +0000 | [diff] [blame] | 63 | #define I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ |
| 64 | PAD_CTL_PUS_100K_UP | PAD_CTL_ODE) |
| 65 | |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 66 | static void setup_iomux_i2c(void) |
| 67 | { |
Benoît Thébaudeau | b66011e | 2013-05-03 10:32:34 +0000 | [diff] [blame] | 68 | static const iomux_v3_cfg_t i2c1_pads[] = { |
| 69 | NEW_PAD_CTRL(MX53_PAD_CSI0_DAT8__I2C1_SDA, I2C_PAD_CTRL), |
| 70 | NEW_PAD_CTRL(MX53_PAD_CSI0_DAT9__I2C1_SCL, I2C_PAD_CTRL), |
| 71 | }; |
| 72 | |
| 73 | imx_iomux_v3_setup_multiple_pads(i2c1_pads, ARRAY_SIZE(i2c1_pads)); |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 74 | } |
| 75 | |
| 76 | static int power_init(void) |
| 77 | { |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 78 | unsigned int val; |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 79 | int ret; |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 80 | struct pmic *p; |
| 81 | |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 82 | if (!i2c_probe(CONFIG_SYS_DIALOG_PMIC_I2C_ADDR)) { |
Fabio Estevam | df5b4c3 | 2012-12-28 04:05:28 +0000 | [diff] [blame] | 83 | ret = pmic_dialog_init(I2C_PMIC); |
| 84 | if (ret) |
| 85 | return ret; |
Łukasz Majewski | 1c6dba1 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 86 | |
| 87 | p = pmic_get("DIALOG_PMIC"); |
| 88 | if (!p) |
| 89 | return -ENODEV; |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 90 | |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 91 | env_set("fdt_file", "imx53-qsb.dtb"); |
Fabio Estevam | a68b151 | 2014-11-10 17:38:19 -0200 | [diff] [blame] | 92 | |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 93 | /* Set VDDA to 1.25V */ |
| 94 | val = DA9052_BUCKCORE_BCOREEN | DA_BUCKCORE_VBCORE_1_250V; |
| 95 | ret = pmic_reg_write(p, DA9053_BUCKCORE_REG, val); |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 96 | if (ret) { |
| 97 | printf("Writing to BUCKCORE_REG failed: %d\n", ret); |
| 98 | return ret; |
| 99 | } |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 100 | |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 101 | pmic_reg_read(p, DA9053_SUPPLY_REG, &val); |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 102 | val |= DA9052_SUPPLY_VBCOREGO; |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 103 | ret = pmic_reg_write(p, DA9053_SUPPLY_REG, val); |
| 104 | if (ret) { |
| 105 | printf("Writing to SUPPLY_REG failed: %d\n", ret); |
| 106 | return ret; |
| 107 | } |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 108 | |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 109 | /* Set Vcc peripheral to 1.30V */ |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 110 | ret = pmic_reg_write(p, DA9053_BUCKPRO_REG, 0x62); |
| 111 | if (ret) { |
| 112 | printf("Writing to BUCKPRO_REG failed: %d\n", ret); |
| 113 | return ret; |
| 114 | } |
| 115 | |
| 116 | ret = pmic_reg_write(p, DA9053_SUPPLY_REG, 0x62); |
| 117 | if (ret) { |
| 118 | printf("Writing to SUPPLY_REG failed: %d\n", ret); |
| 119 | return ret; |
| 120 | } |
| 121 | |
| 122 | return ret; |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 123 | } |
| 124 | |
| 125 | if (!i2c_probe(CONFIG_SYS_FSL_PMIC_I2C_ADDR)) { |
Fabio Estevam | f330cec | 2013-11-20 21:17:36 -0200 | [diff] [blame] | 126 | ret = pmic_init(I2C_0); |
Fabio Estevam | df5b4c3 | 2012-12-28 04:05:28 +0000 | [diff] [blame] | 127 | if (ret) |
| 128 | return ret; |
Łukasz Majewski | 1c6dba1 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 129 | |
Fabio Estevam | 39ffa1f | 2012-12-11 06:36:58 +0000 | [diff] [blame] | 130 | p = pmic_get("FSL_PMIC"); |
Łukasz Majewski | 1c6dba1 | 2012-11-13 03:21:55 +0000 | [diff] [blame] | 131 | if (!p) |
| 132 | return -ENODEV; |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 133 | |
Simon Glass | 6a38e41 | 2017-08-03 12:22:09 -0600 | [diff] [blame] | 134 | env_set("fdt_file", "imx53-qsrb.dtb"); |
Fabio Estevam | a68b151 | 2014-11-10 17:38:19 -0200 | [diff] [blame] | 135 | |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 136 | /* Set VDDGP to 1.25V for 1GHz on SW1 */ |
| 137 | pmic_reg_read(p, REG_SW_0, &val); |
| 138 | val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_250V_MC34708; |
| 139 | ret = pmic_reg_write(p, REG_SW_0, val); |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 140 | if (ret) { |
| 141 | printf("Writing to REG_SW_0 failed: %d\n", ret); |
| 142 | return ret; |
| 143 | } |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 144 | |
| 145 | /* Set VCC as 1.30V on SW2 */ |
| 146 | pmic_reg_read(p, REG_SW_1, &val); |
| 147 | val = (val & ~SWx_VOLT_MASK_MC34708) | SWx_1_300V_MC34708; |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 148 | ret = pmic_reg_write(p, REG_SW_1, val); |
| 149 | if (ret) { |
| 150 | printf("Writing to REG_SW_1 failed: %d\n", ret); |
| 151 | return ret; |
| 152 | } |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 153 | |
| 154 | /* Set global reset timer to 4s */ |
| 155 | pmic_reg_read(p, REG_POWER_CTL2, &val); |
| 156 | val = (val & ~TIMER_MASK_MC34708) | TIMER_4S_MC34708; |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 157 | ret = pmic_reg_write(p, REG_POWER_CTL2, val); |
| 158 | if (ret) { |
| 159 | printf("Writing to REG_POWER_CTL2 failed: %d\n", ret); |
| 160 | return ret; |
| 161 | } |
Fabio Estevam | 0436b7a | 2012-05-07 10:26:00 +0000 | [diff] [blame] | 162 | |
| 163 | /* Set VUSBSEL and VUSBEN for USB PHY supply*/ |
| 164 | pmic_reg_read(p, REG_MODE_0, &val); |
| 165 | val |= (VUSBSEL_MC34708 | VUSBEN_MC34708); |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 166 | ret = pmic_reg_write(p, REG_MODE_0, val); |
| 167 | if (ret) { |
| 168 | printf("Writing to REG_MODE_0 failed: %d\n", ret); |
| 169 | return ret; |
| 170 | } |
Fabio Estevam | 0436b7a | 2012-05-07 10:26:00 +0000 | [diff] [blame] | 171 | |
| 172 | /* Set SWBST to 5V in auto mode */ |
| 173 | val = SWBST_AUTO; |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 174 | ret = pmic_reg_write(p, SWBST_CTRL, val); |
| 175 | if (ret) { |
| 176 | printf("Writing to SWBST_CTRL failed: %d\n", ret); |
| 177 | return ret; |
| 178 | } |
| 179 | |
| 180 | return ret; |
Fabio Estevam | 082a112 | 2012-05-07 10:25:59 +0000 | [diff] [blame] | 181 | } |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 182 | |
Fabio Estevam | fbbdadf | 2012-12-28 04:05:29 +0000 | [diff] [blame] | 183 | return -1; |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 184 | } |
| 185 | |
| 186 | static void clock_1GHz(void) |
| 187 | { |
| 188 | int ret; |
Benoît Thébaudeau | afac165 | 2012-09-27 10:19:58 +0000 | [diff] [blame] | 189 | u32 ref_clk = MXC_HCLK; |
Fabio Estevam | 2fc5832 | 2012-04-30 08:12:04 +0000 | [diff] [blame] | 190 | /* |
| 191 | * After increasing voltage to 1.25V, we can switch |
| 192 | * CPU clock to 1GHz and DDR to 400MHz safely |
| 193 | */ |
| 194 | ret = mxc_set_clock(ref_clk, 1000, MXC_ARM_CLK); |
| 195 | if (ret) |
| 196 | printf("CPU: Switch CPU clock to 1GHZ failed\n"); |
| 197 | |
| 198 | ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK); |
| 199 | ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK); |
| 200 | if (ret) |
| 201 | printf("CPU: Switch DDR clock to 400MHz failed\n"); |
| 202 | } |
| 203 | |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 204 | int board_early_init_f(void) |
| 205 | { |
| 206 | setup_iomux_uart(); |
Vikram Narayanan | 8bb48d6 | 2012-11-10 02:32:46 +0000 | [diff] [blame] | 207 | setup_iomux_lcd(); |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 208 | |
| 209 | return 0; |
| 210 | } |
| 211 | |
Stefano Babic | cbf6c9c | 2012-08-05 00:18:53 +0000 | [diff] [blame] | 212 | /* |
| 213 | * Do not overwrite the console |
| 214 | * Use always serial for U-Boot console |
| 215 | */ |
| 216 | int overwrite_console(void) |
Fabio Estevam | 026c986 | 2012-04-30 08:12:03 +0000 | [diff] [blame] | 217 | { |
Stefano Babic | cbf6c9c | 2012-08-05 00:18:53 +0000 | [diff] [blame] | 218 | return 1; |
Fabio Estevam | 026c986 | 2012-04-30 08:12:03 +0000 | [diff] [blame] | 219 | } |
Fabio Estevam | 026c986 | 2012-04-30 08:12:03 +0000 | [diff] [blame] | 220 | |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 221 | int board_init(void) |
| 222 | { |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 223 | gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; |
| 224 | |
Stefano Babic | 59dffd6 | 2012-02-22 00:24:41 +0000 | [diff] [blame] | 225 | mxc_set_sata_internal_clock(); |
Fabio Estevam | 99f896e | 2012-05-29 05:54:39 +0000 | [diff] [blame] | 226 | setup_iomux_i2c(); |
Fabio Estevam | b665c83 | 2012-12-26 05:50:20 +0000 | [diff] [blame] | 227 | |
Fabio Estevam | b665c83 | 2012-12-26 05:50:20 +0000 | [diff] [blame] | 228 | return 0; |
| 229 | } |
| 230 | |
| 231 | int board_late_init(void) |
| 232 | { |
Fabio Estevam | 99f896e | 2012-05-29 05:54:39 +0000 | [diff] [blame] | 233 | if (!power_init()) |
| 234 | clock_1GHz(); |
Stefano Babic | 59dffd6 | 2012-02-22 00:24:41 +0000 | [diff] [blame] | 235 | |
Jason Liu | f5b81c8 | 2011-05-13 01:58:55 +0000 | [diff] [blame] | 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | int checkboard(void) |
| 240 | { |
| 241 | puts("Board: MX53 LOCO\n"); |
| 242 | |
| 243 | return 0; |
| 244 | } |