Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2011 Samsung Electronics |
| 4 | * |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 5 | * Configuration settings for the SAMSUNG SMDKV310 (EXYNOS4210) board. |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __CONFIG_H |
| 9 | #define __CONFIG_H |
| 10 | |
Simon Glass | 05b3bac3 | 2014-10-07 22:01:49 -0600 | [diff] [blame] | 11 | #include "exynos4-common.h" |
| 12 | |
| 13 | #undef CONFIG_BOARD_COMMON |
Marek Vasut | bc623f2 | 2015-08-19 23:27:26 +0200 | [diff] [blame] | 14 | #undef CONFIG_USB_GADGET_DWC2_OTG_PHY |
Simon Glass | 05b3bac3 | 2014-10-07 22:01:49 -0600 | [diff] [blame] | 15 | #undef CONFIG_REVISION_TAG |
Simon Glass | 05b3bac3 | 2014-10-07 22:01:49 -0600 | [diff] [blame] | 16 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 17 | /* High Level Configuration Options */ |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 18 | #define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 19 | |
Chander Kashyap | 0f3e95f | 2011-09-20 21:25:01 +0000 | [diff] [blame] | 20 | /* Mach Type */ |
| 21 | #define CONFIG_MACH_TYPE MACH_TYPE_SMDKV310 |
| 22 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 23 | #define CONFIG_SYS_SDRAM_BASE 0x40000000 |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 24 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 25 | /* Handling Sleep Mode*/ |
| 26 | #define S5P_CHECK_SLEEP 0x00000BAD |
| 27 | #define S5P_CHECK_DIDLE 0xBAD00000 |
Rajeshwari Shinde | bed2442 | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 28 | #define S5P_CHECK_LPA 0xABAD0000 |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 29 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 30 | /* select serial console configuration */ |
Chander Kashyap | 4131a77 | 2011-12-06 23:34:12 +0000 | [diff] [blame] | 31 | #define EXYNOS4_DEFAULT_UART_OFFSET 0x010000 |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 32 | |
Chander Kashyap | 0cd984c | 2011-09-20 21:25:03 +0000 | [diff] [blame] | 33 | /* MMC SPL */ |
Rajeshwari Shinde | bed2442 | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 34 | #define CONFIG_SKIP_LOWLEVEL_INIT |
Chander Kashyap | e8d043e | 2011-09-20 21:25:04 +0000 | [diff] [blame] | 35 | #define COPY_BL2_FNPTR_ADDR 0x00002488 |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 36 | |
| 37 | #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" |
| 38 | |
| 39 | /* Miscellaneous configurable options */ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 40 | #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 41 | /* memtest works on */ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 42 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000) |
| 43 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 44 | /* SMDKV310 has 4 bank of DRAM */ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 45 | #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ |
| 46 | #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE |
| 47 | #define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE |
| 48 | #define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE) |
| 49 | #define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE |
| 50 | #define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE)) |
| 51 | #define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE |
| 52 | #define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE)) |
| 53 | #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE |
| 54 | |
| 55 | /* FLASH and environment organization */ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 56 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 57 | #define CONFIG_CLK_1000_400_200 |
| 58 | |
| 59 | /* MIU (Memory Interleaving Unit) */ |
| 60 | #define CONFIG_MIU_2BIT_INTERLEAVED |
| 61 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 62 | #define RESERVE_BLOCK_SIZE (512) |
| 63 | #define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 64 | |
Rajeshwari Shinde | bed2442 | 2013-07-04 12:29:17 +0530 | [diff] [blame] | 65 | #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) |
| 66 | |
| 67 | #define CONFIG_SYS_INIT_SP_ADDR 0x02040000 |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 68 | |
Bin Meng | 7557405 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 69 | /* U-Boot copy size from boot Media to DRAM.*/ |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 70 | #define COPY_BL2_SIZE 0x80000 |
| 71 | #define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512) |
| 72 | #define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512) |
| 73 | |
| 74 | /* Ethernet Controllor Driver */ |
| 75 | #ifdef CONFIG_CMD_NET |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 76 | #define CONFIG_ENV_SROM_BANK 1 |
| 77 | #endif /*CONFIG_CMD_NET*/ |
Thomas Abraham | 4cd38a4 | 2011-06-03 22:52:17 +0000 | [diff] [blame] | 78 | |
Chander Kashyap | bfef54d | 2011-05-24 20:02:56 +0000 | [diff] [blame] | 79 | #endif /* __CONFIG_H */ |