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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese7be1b9b2016-05-25 08:21:21 +02002/*
3 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
Stefan Roese7be1b9b2016-05-25 08:21:21 +02004 */
5
Stefan Roese5c806f12016-10-25 10:56:19 +02006#ifndef _CONFIG_MVEBU_ARMADA_8K_H
7#define _CONFIG_MVEBU_ARMADA_8K_H
Stefan Roese7be1b9b2016-05-25 08:21:21 +02008
9/*
10 * High Level Configuration Options (easy to change)
11 */
12#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
13
Stefan Roese7be1b9b2016-05-25 08:21:21 +020014/* additions for new ARM relocation support */
15#define CONFIG_SYS_SDRAM_BASE 0x00000000
16
Stefan Roese7be1b9b2016-05-25 08:21:21 +020017/* auto boot */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020018
Stefan Roese7be1b9b2016-05-25 08:21:21 +020019#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
20 115200, 230400, 460800, 921600 }
21
22/*
23 * For booting Linux, the board info and command line data
24 * have to be in the first 8 MB of memory, since this is
25 * the maximum mapped by the Linux kernel during initialization.
26 */
27#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
28#define CONFIG_INITRD_TAG /* enable INITRD tag */
29#define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */
30
31#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020032
33/*
34 * Size of malloc() pool
35 */
36#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4MiB for malloc() */
37
38/*
39 * Other required minimal configurations
40 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020041#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020042#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
43#define CONFIG_SYS_MAXARGS 32 /* max number of command args */
44
Stefan Roese7be1b9b2016-05-25 08:21:21 +020045/* End of 16M scrubbed by training in bootrom */
46#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE + 0xFF0000)
47
Baruch Siach0d022902018-08-14 18:05:46 +030048/* When runtime detection fails this is the default */
Baruch Siach0d022902018-08-14 18:05:46 +030049
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030050#define CONFIG_SYS_MAX_NAND_DEVICE 1
51#define CONFIG_SYS_NAND_MAX_CHIPS 1
52#define CONFIG_SYS_NAND_ONFI_DETECTION
Konstantin Porotchkin0edf7722017-04-05 18:22:33 +030053
Stefan Roese97c3ba02017-02-20 12:25:26 +010054/*
55 * Ethernet Driver configuration
56 */
Stefan Roese97c3ba02017-02-20 12:25:26 +010057#define CONFIG_ARP_TIMEOUT 200
58#define CONFIG_NET_RETRY_COUNT 50
59
Bin Mengabe40262017-07-19 21:50:06 +080060#define CONFIG_USB_MAX_CONTROLLER_COUNT (3 + 3)
Stefan Roese7be1b9b2016-05-25 08:21:21 +020061
62/* USB ethernet */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020063
64/*
65 * SATA/SCSI/AHCI configuration
66 */
Stefan Roese7be1b9b2016-05-25 08:21:21 +020067#define CONFIG_SCSI_AHCI_PLAT
Stefan Roese7be1b9b2016-05-25 08:21:21 +020068#define CONFIG_LBA48
69#define CONFIG_SYS_64BIT_LBA
70
71#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
72#define CONFIG_SYS_SCSI_MAX_LUN 1
73#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
74 CONFIG_SYS_SCSI_MAX_LUN)
75
Stefan Roesec20e9d52016-10-27 13:36:45 +020076/*
77 * PCI configuration
78 */
79#ifdef CONFIG_PCIE_DW_MVEBU
80#define CONFIG_E1000
Stefan Roesec20e9d52016-10-27 13:36:45 +020081#endif
82
Mark Kettenis8cfb67b2018-03-17 09:34:27 +010083#define BOOT_TARGET_DEVICES(func) \
84 func(MMC, mmc, 1) \
85 func(MMC, mmc, 0) \
86 func(USB, usb, 0) \
87 func(SCSI, scsi, 0) \
88 func(PXE, pxe, na) \
89 func(DHCP, dhcp, na)
90
91#include <config_distro_bootcmd.h>
92
93#define CONFIG_EXTRA_ENV_SETTINGS \
94 "scriptaddr=0x4d00000\0" \
95 "pxefile_addr_r=0x4e00000\0" \
96 "fdt_addr_r=0x4f00000\0" \
97 "kernel_addr_r=0x5000000\0" \
98 "ramdisk_addr_r=0x8000000\0" \
99 "fdtfile=marvell/" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
100 BOOTENV
101
Stefan Roese5c806f12016-10-25 10:56:19 +0200102#endif /* _CONFIG_MVEBU_ARMADA_8K_H */